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    <title>topic LS1023A Synchronous Abort issue is occurs in Layerscape</title>
    <link>https://community.nxp.com/t5/Layerscape/LS1023A-Synchronous-Abort-issue-is-occurs/m-p/1971385#M14980</link>
    <description>&lt;P&gt;Dear；&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;LS1023A After the uboot is started, run saveenv and report a problem with the Synchronous Abort handler, esr 0x96000210 after the device is restarted.&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;The following is the log of uboot startup and restart after saveenv is executed. May I ask from what aspects should I locate the problem? Thank you!&lt;/P&gt;&lt;P&gt;NOTICE: 1 GB DDR?, 32-bit, CL=11, ECC off&lt;BR /&gt;NOTICE: BL2: v2.4(release):LSDK-21.08-0-g340b20bcb-dirty&lt;BR /&gt;NOTICE: BL2: Built : 16:18:14, Oct 10 2024&lt;BR /&gt;NOTICE: BL2: Booting BL31&lt;BR /&gt;NOTICE: BL31: v2.4(release):LSDK-21.08-0-g340b20bcb-dirty&lt;BR /&gt;NOTICE: BL31: Built : 16:18:14, Oct 10 2024&lt;BR /&gt;NOTICE: Welcome to ls1043aqds BL31 Phase&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;U-Boot 2021.04-dirty (Oct 10 2024 - 16:17:53 +0800)&lt;/P&gt;&lt;P&gt;SoC: LS1023A Rev1.1 (0x87920911)&lt;BR /&gt;get_board_sys_clk: sysclk_conf = 0x00&lt;BR /&gt;get_board_sys_clk: sysclk_conf = 0x00&lt;BR /&gt;Clock Configuration:&lt;BR /&gt;CPU0(A53):1600 MHz CPU1(A53):1600 MHz&lt;BR /&gt;Bus: 400 MHz DDR: 1066.667 MT/s FMAN: 800 MHz&lt;BR /&gt;Reset Configuration Word (RCW):&lt;BR /&gt;00000000: 08100010 10000000 00000000 00000000&lt;BR /&gt;00000010: 14550002 80004012 40025000 41002000&lt;BR /&gt;00000020: 00000000 00000000 00000000 00038800&lt;BR /&gt;00000030: 20124000 00001000 00000060 00000001&lt;BR /&gt;Model: LS1043A QDS Board&lt;BR /&gt;Board: LS1043AQDS, boot from vBank: 0&lt;BR /&gt;Sys ID: 0x00, Sys Ver: 0x00&lt;BR /&gt;FPGA: v0 (123456789:;&amp;lt;=&amp;gt;?), build 1541&lt;BR /&gt;I2C: ready&lt;BR /&gt;DRAM: 958 MiB (DDR3, 32-bit, CL=11, ECC off)&lt;BR /&gt;clear_bss&lt;BR /&gt;Using SERDES1 Protocol: 5205 (0x1455)&lt;BR /&gt;is_flash_available 0&lt;BR /&gt;NAND: 0 MiB&lt;BR /&gt;MMC: FSL_SDHC: 0&lt;BR /&gt;Loading Environment from SPIFlash... SF: Detected gd25lq128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB&lt;BR /&gt;*** Warning - bad CRC, using default environment&lt;/P&gt;&lt;P&gt;EEPROM: Read failed.&lt;BR /&gt;In: serial&lt;BR /&gt;Out: serial&lt;BR /&gt;Err: serial&lt;BR /&gt;Ϻ SF: Detected gd25lq128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB&lt;BR /&gt;Fman1: Uploading microcode version 106.4.18&lt;BR /&gt;FM1@DTSEC1&lt;BR /&gt;Error: FM1@DTSEC1 address not set.&lt;BR /&gt;, FM1@DTSEC2&lt;BR /&gt;Error: FM1@DTSEC2 address not set.&lt;BR /&gt;, FM1@DTSEC5&lt;BR /&gt;Error: FM1@DTSEC5 address not set.&lt;BR /&gt;, FM1@DTSEC6&lt;BR /&gt;Error: FM1@DTSEC6 address not set.&lt;/P&gt;&lt;P&gt;Hit any key to stop autoboot: 6 0&lt;BR /&gt;=&amp;gt; saveenv&lt;BR /&gt;Saving Environment to SPIFlash... SF: Detected gd25lq128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB&lt;BR /&gt;Erasing SPI flash...%¥ѥ¹ to SPI flash...done&lt;BR /&gt;OK&lt;BR /&gt;=&amp;gt;&lt;BR /&gt;NOTICE: 1 GB DDR?, 32-bit, CL=11, ECC off&lt;BR /&gt;NOTICE: BL2: v2.4(release):LSDK-21.08-0-g340b20bcb-dirty&lt;BR /&gt;NOTICE: BL2: Built : 16:18:14, Oct 10 2024&lt;BR /&gt;NOTICE: BL2: Booting BL31&lt;BR /&gt;NOTICE: BL31: v2.4(release):LSDK-21.08-0-g340b20bcb-dirty&lt;BR /&gt;NOTICE: BL31: Built : 16:18:14, Oct 10 2024&lt;BR /&gt;NOTICE: Welcome to ls1043aqds BL31 Phase&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;U-Boot 2021.04-dirty (Oct 10 2024 - 16:17:53 +0800)&lt;/P&gt;&lt;P&gt;SoC: LS1023A Rev1.1 (0x87920911)&lt;BR /&gt;get_board_sys_clk: sysclk_conf = 0x00&lt;BR /&gt;get_board_sys_clk: sysclk_conf = 0x00&lt;BR /&gt;Clock Configuration:&lt;BR /&gt;CPU0(A53):1600 MHz CPU1(A53):1600 MHz&lt;BR /&gt;Bus: 400 MHz DDR: 1066.667 MT/s FMAN: 800 MHz&lt;BR /&gt;Reset Configuration Word (RCW):&lt;BR /&gt;00000000: 08100010 10000000 00000000 00000000&lt;BR /&gt;00000010: 14550002 80004012 40025000 41002000&lt;BR /&gt;00000020: 00000000 00000000 00000000 00038800&lt;BR /&gt;00000030: 20124000 00001000 00000060 00000001&lt;BR /&gt;Model: LS1043A QDS Board&lt;BR /&gt;Board: LS1043AQDS, boot from vBank: 0&lt;BR /&gt;Sys ID: 0x00, Sys Ver: 0x00&lt;BR /&gt;FPGA: v0 (123456789:;&amp;lt;=&amp;gt;?), build 1541&lt;BR /&gt;I2C: ready&lt;BR /&gt;DRAM: 958 MiB (DDR3, 32-bit, CL=11, ECC off)&lt;BR /&gt;clear_bss&lt;BR /&gt;Using SERDES1 Protocol: 5205 (0x1455)&lt;BR /&gt;"Synchronous Abort" handler, esr 0x96000210&lt;BR /&gt;elr: 0000000082052e3c lr : 0000000082019bc0 (reloc)&lt;BR /&gt;elr: 00000000b7b7ce3c lr : 00000000b7b43bc0&lt;BR /&gt;x0 : 0000000000000000 x1 : 000000007602a004&lt;BR /&gt;x2 : 0000000000000080 x3 : 0000000000000000&lt;BR /&gt;x4 : 00000000b7bd2348 x5 : 0000000000000000&lt;BR /&gt;x6 : 00000000b7a27600 x7 : 0000000000000007&lt;BR /&gt;x8 : 0000000000000002 x9 : 0000000000000008&lt;BR /&gt;x10: 0000000000000002 x11: 0000000000000010&lt;BR /&gt;x12: 0000000000000006 x13: 000000000001869f&lt;BR /&gt;x14: 00000000b7a22250 x15: 0000000000000020&lt;BR /&gt;x16: 00000000b7b7284c x17: 0000000000000000&lt;BR /&gt;x18: 00000000b7a25db0 x19: 00000000b7bc82c8&lt;BR /&gt;x20: 0000000035b2a000 x21: 00000000b7baf32f&lt;BR /&gt;x22: 00000000b7a22080 x23: 0000000000000080&lt;BR /&gt;x24: 0000000000000000 x25: 0000000000001fff&lt;BR /&gt;x26: 0000000000000000 x27: 0000000000000000&lt;BR /&gt;x28: 0000000000000000 x29: 00000000b7a22000&lt;/P&gt;&lt;P&gt;Code: 54ffff80 9100c000 17fffff7 f9402241 (3860c820)&lt;BR /&gt;Resetting CPU ...&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Thu, 10 Oct 2024 12:49:34 GMT</pubDate>
    <dc:creator>jack_huang1</dc:creator>
    <dc:date>2024-10-10T12:49:34Z</dc:date>
    <item>
      <title>LS1023A Synchronous Abort issue is occurs</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1023A-Synchronous-Abort-issue-is-occurs/m-p/1971385#M14980</link>
      <description>&lt;P&gt;Dear；&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;LS1023A After the uboot is started, run saveenv and report a problem with the Synchronous Abort handler, esr 0x96000210 after the device is restarted.&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;The following is the log of uboot startup and restart after saveenv is executed. May I ask from what aspects should I locate the problem? Thank you!&lt;/P&gt;&lt;P&gt;NOTICE: 1 GB DDR?, 32-bit, CL=11, ECC off&lt;BR /&gt;NOTICE: BL2: v2.4(release):LSDK-21.08-0-g340b20bcb-dirty&lt;BR /&gt;NOTICE: BL2: Built : 16:18:14, Oct 10 2024&lt;BR /&gt;NOTICE: BL2: Booting BL31&lt;BR /&gt;NOTICE: BL31: v2.4(release):LSDK-21.08-0-g340b20bcb-dirty&lt;BR /&gt;NOTICE: BL31: Built : 16:18:14, Oct 10 2024&lt;BR /&gt;NOTICE: Welcome to ls1043aqds BL31 Phase&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;U-Boot 2021.04-dirty (Oct 10 2024 - 16:17:53 +0800)&lt;/P&gt;&lt;P&gt;SoC: LS1023A Rev1.1 (0x87920911)&lt;BR /&gt;get_board_sys_clk: sysclk_conf = 0x00&lt;BR /&gt;get_board_sys_clk: sysclk_conf = 0x00&lt;BR /&gt;Clock Configuration:&lt;BR /&gt;CPU0(A53):1600 MHz CPU1(A53):1600 MHz&lt;BR /&gt;Bus: 400 MHz DDR: 1066.667 MT/s FMAN: 800 MHz&lt;BR /&gt;Reset Configuration Word (RCW):&lt;BR /&gt;00000000: 08100010 10000000 00000000 00000000&lt;BR /&gt;00000010: 14550002 80004012 40025000 41002000&lt;BR /&gt;00000020: 00000000 00000000 00000000 00038800&lt;BR /&gt;00000030: 20124000 00001000 00000060 00000001&lt;BR /&gt;Model: LS1043A QDS Board&lt;BR /&gt;Board: LS1043AQDS, boot from vBank: 0&lt;BR /&gt;Sys ID: 0x00, Sys Ver: 0x00&lt;BR /&gt;FPGA: v0 (123456789:;&amp;lt;=&amp;gt;?), build 1541&lt;BR /&gt;I2C: ready&lt;BR /&gt;DRAM: 958 MiB (DDR3, 32-bit, CL=11, ECC off)&lt;BR /&gt;clear_bss&lt;BR /&gt;Using SERDES1 Protocol: 5205 (0x1455)&lt;BR /&gt;is_flash_available 0&lt;BR /&gt;NAND: 0 MiB&lt;BR /&gt;MMC: FSL_SDHC: 0&lt;BR /&gt;Loading Environment from SPIFlash... SF: Detected gd25lq128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB&lt;BR /&gt;*** Warning - bad CRC, using default environment&lt;/P&gt;&lt;P&gt;EEPROM: Read failed.&lt;BR /&gt;In: serial&lt;BR /&gt;Out: serial&lt;BR /&gt;Err: serial&lt;BR /&gt;Ϻ SF: Detected gd25lq128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB&lt;BR /&gt;Fman1: Uploading microcode version 106.4.18&lt;BR /&gt;FM1@DTSEC1&lt;BR /&gt;Error: FM1@DTSEC1 address not set.&lt;BR /&gt;, FM1@DTSEC2&lt;BR /&gt;Error: FM1@DTSEC2 address not set.&lt;BR /&gt;, FM1@DTSEC5&lt;BR /&gt;Error: FM1@DTSEC5 address not set.&lt;BR /&gt;, FM1@DTSEC6&lt;BR /&gt;Error: FM1@DTSEC6 address not set.&lt;/P&gt;&lt;P&gt;Hit any key to stop autoboot: 6 0&lt;BR /&gt;=&amp;gt; saveenv&lt;BR /&gt;Saving Environment to SPIFlash... SF: Detected gd25lq128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB&lt;BR /&gt;Erasing SPI flash...%¥ѥ¹ to SPI flash...done&lt;BR /&gt;OK&lt;BR /&gt;=&amp;gt;&lt;BR /&gt;NOTICE: 1 GB DDR?, 32-bit, CL=11, ECC off&lt;BR /&gt;NOTICE: BL2: v2.4(release):LSDK-21.08-0-g340b20bcb-dirty&lt;BR /&gt;NOTICE: BL2: Built : 16:18:14, Oct 10 2024&lt;BR /&gt;NOTICE: BL2: Booting BL31&lt;BR /&gt;NOTICE: BL31: v2.4(release):LSDK-21.08-0-g340b20bcb-dirty&lt;BR /&gt;NOTICE: BL31: Built : 16:18:14, Oct 10 2024&lt;BR /&gt;NOTICE: Welcome to ls1043aqds BL31 Phase&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;U-Boot 2021.04-dirty (Oct 10 2024 - 16:17:53 +0800)&lt;/P&gt;&lt;P&gt;SoC: LS1023A Rev1.1 (0x87920911)&lt;BR /&gt;get_board_sys_clk: sysclk_conf = 0x00&lt;BR /&gt;get_board_sys_clk: sysclk_conf = 0x00&lt;BR /&gt;Clock Configuration:&lt;BR /&gt;CPU0(A53):1600 MHz CPU1(A53):1600 MHz&lt;BR /&gt;Bus: 400 MHz DDR: 1066.667 MT/s FMAN: 800 MHz&lt;BR /&gt;Reset Configuration Word (RCW):&lt;BR /&gt;00000000: 08100010 10000000 00000000 00000000&lt;BR /&gt;00000010: 14550002 80004012 40025000 41002000&lt;BR /&gt;00000020: 00000000 00000000 00000000 00038800&lt;BR /&gt;00000030: 20124000 00001000 00000060 00000001&lt;BR /&gt;Model: LS1043A QDS Board&lt;BR /&gt;Board: LS1043AQDS, boot from vBank: 0&lt;BR /&gt;Sys ID: 0x00, Sys Ver: 0x00&lt;BR /&gt;FPGA: v0 (123456789:;&amp;lt;=&amp;gt;?), build 1541&lt;BR /&gt;I2C: ready&lt;BR /&gt;DRAM: 958 MiB (DDR3, 32-bit, CL=11, ECC off)&lt;BR /&gt;clear_bss&lt;BR /&gt;Using SERDES1 Protocol: 5205 (0x1455)&lt;BR /&gt;"Synchronous Abort" handler, esr 0x96000210&lt;BR /&gt;elr: 0000000082052e3c lr : 0000000082019bc0 (reloc)&lt;BR /&gt;elr: 00000000b7b7ce3c lr : 00000000b7b43bc0&lt;BR /&gt;x0 : 0000000000000000 x1 : 000000007602a004&lt;BR /&gt;x2 : 0000000000000080 x3 : 0000000000000000&lt;BR /&gt;x4 : 00000000b7bd2348 x5 : 0000000000000000&lt;BR /&gt;x6 : 00000000b7a27600 x7 : 0000000000000007&lt;BR /&gt;x8 : 0000000000000002 x9 : 0000000000000008&lt;BR /&gt;x10: 0000000000000002 x11: 0000000000000010&lt;BR /&gt;x12: 0000000000000006 x13: 000000000001869f&lt;BR /&gt;x14: 00000000b7a22250 x15: 0000000000000020&lt;BR /&gt;x16: 00000000b7b7284c x17: 0000000000000000&lt;BR /&gt;x18: 00000000b7a25db0 x19: 00000000b7bc82c8&lt;BR /&gt;x20: 0000000035b2a000 x21: 00000000b7baf32f&lt;BR /&gt;x22: 00000000b7a22080 x23: 0000000000000080&lt;BR /&gt;x24: 0000000000000000 x25: 0000000000001fff&lt;BR /&gt;x26: 0000000000000000 x27: 0000000000000000&lt;BR /&gt;x28: 0000000000000000 x29: 00000000b7a22000&lt;/P&gt;&lt;P&gt;Code: 54ffff80 9100c000 17fffff7 f9402241 (3860c820)&lt;BR /&gt;Resetting CPU ...&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 10 Oct 2024 12:49:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1023A-Synchronous-Abort-issue-is-occurs/m-p/1971385#M14980</guid>
      <dc:creator>jack_huang1</dc:creator>
      <dc:date>2024-10-10T12:49:34Z</dc:date>
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