topic Re: how to change ls1028ardb emmc actual clock ? in Layerscape

how to change ls1028ardb emmc actual clock ?

Eddy1 — Wed, 12 Jun 2024 10:03:58 GMT

Hi：

Recently, I've installed the ls1028ardb edge 2.0 image onto the official evaluation board. However, through /sys/kernel/debug/mmc1/ios, I found that the actual clock of emmc is lower than expected. For example, even if the HS200 mode is set, the actual clock is only 83M. Could you please advise on how to adjust the actual clock of emmc?

clock: 200000000 Hz actual clock: 83333333 Hz vdd: 21 (3.3 ~ 3.4 V) bus mode: 2 (push-pull) chip select: 0 (don't care) power mode: 2 (on) bus width: 3 (8 bits) timing spec: 9 (mmc HS200) signal voltage: 1 (1.80 V) driver type: 0 (driver type B)

Re: how to change ls1028ardb emmc actual clock ?

LFGP — Thu, 13 Jun 2024 16:59:09 GMT

The LS1028ARDB eSDHC2 interface is connected to an 8 GB eMMC device, MTFC8GAKAJCN (from Micron) on the board. The eMMC memory can support x1, x4 and x8 data width and data rate of HS400 mode.
for details please review the subject "15.6.3.8 HS400" into the LS1028ARM

Re: how to change ls1028ardb emmc actual clock ?

Eddy1 — Fri, 14 Jun 2024 07:50:46 GMT

Hi：

Thank you for your reply. I have already notice this. How should we modify it to hs400? Does the default driver support hs400?

Re: how to change ls1028ardb emmc actual clock ?

LFGP — Fri, 14 Jun 2024 16:57:47 GMT

The actual driver has support for the HS400 mode.

Please use the LLDP 6.1.55, with this one you don't have to add any patch driver or modify the dts.

please note:

root@localhost:~# cat /sys/kernel/debug/mmc1/ios
clock:          200000000 Hz
actual clock:   150000000 Hz
vdd:            21 (3.3 ~ 3.4 V)
bus mode:       2 (push-pull)
chip select:    0 (don't care)
power mode:     2 (on)
bus width:      3 (8 bits)
timing spec:    10 (mmc HS400)
signal voltage: 1 (1.80 V)
driver type:    0 (driver type B)

Technical parameters of the eSDHC HS400 mode are provided in the QorIQ LS1028A/LS1018A Data Sheet.

Due to A-011334: Limited clock dividers for HS400 mode, maximum SDHC_CLK frequency supported in HS400 (VDD=1.0v) mode is 150 MHz.

Re: how to change ls1028ardb emmc actual clock ?

Eddy1 — Tue, 18 Jun 2024 02:22:01 GMT

Hi：

Thank you for your reply. Currently, some customers have mass-produced according to this version of BSP, and they need to solve this problem based on the current version. Is there a similar patch available?

Re: how to change ls1028ardb emmc actual clock ?

LFGP — Thu, 20 Jun 2024 17:23:53 GMT

the actual driver has support for HS400 mode.
For steps please review the subject "15.6.3.8 HS400" into the LS1028ARM.

Re: how to change ls1028ardb emmc actual clock ?

Eddy1 — Fri, 21 Jun 2024 01:40:52 GMT

Okay, I'll check the driver code