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    <title>LayerscapeのトピックRe: LX2160 two 1-Rank DDR4 DIMM modules with one memory controller (MC1)</title>
    <link>https://community.nxp.com/t5/Layerscape/LX2160-two-1-Rank-DDR4-DIMM-modules-with-one-memory-controller/m-p/1884823#M14421</link>
    <description>&lt;P&gt;&lt;SPAN&gt;Yes, we already used QCVS DDR tool in Code Warrior, it allowed us to improve DDR eye diagrams. &lt;/SPAN&gt;&lt;SPAN&gt;DDR memory seems to work stable after these adjustments. &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;The problem is that if we use two 1R DIMM modules in one MC, we get an "Invalid cs_in_use value" error during boot and only one of the two 1R modules seems to be active. &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;If we use two 2R modules in one MC, there are no problems or errors during boot and both modules are active.&lt;BR /&gt;&lt;BR /&gt;We want to know if two 1R DIMM modules on one MC is a valid configuration or not.&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Tue, 11 Jun 2024 06:49:09 GMT</pubDate>
    <dc:creator>o_m_v</dc:creator>
    <dc:date>2024-06-11T06:49:09Z</dc:date>
    <item>
      <title>LX2160 two 1-Rank DDR4 DIMM modules with one memory controller (MC1)</title>
      <link>https://community.nxp.com/t5/Layerscape/LX2160-two-1-Rank-DDR4-DIMM-modules-with-one-memory-controller/m-p/1882317#M14412</link>
      <description>&lt;P&gt;Hello NXP,&lt;/P&gt;&lt;P&gt;We have a custom board with LX2160A CPU.&lt;/P&gt;&lt;P&gt;We want to use two 1-Rank DDR4 DIMM modules with one memory controller (MC1), but we are getting error "Invalid cs_in_use value" during boot and only 8GB of 16GB of RAM are available after boot.&lt;/P&gt;&lt;P&gt;We also tried to boot with two 2-Rank DIMMs in MC1, there were no errors and all 16GB of RAM were available after boot.&lt;/P&gt;&lt;P&gt;The error seems to be coming from &lt;A href="https://github.com/nxp-qoriq/atf/blob/lf_v2.6/drivers/nxp/ddr/phy-gen2/phy.c#L109" target="_self"&gt;findrank()&lt;/A&gt; function, where cs_in_use value 0x5 (CS2+CS0) seems to be unsupported.&lt;/P&gt;&lt;P&gt;Is configuration with two 1-Rank modules per one MC valid? Or maybe software updates are available that add support for this configuration?&lt;/P&gt;&lt;P&gt;DIMM modules that we used: Innodisk M4C0-8GS1LCEM, 8GB, 3200 MT/S, 1-Rank, ECC.&lt;BR /&gt;LX2160A clocks: CPU 2200, PLAT 700, DDR 1800.&lt;BR /&gt;Software version: LSDK-21.08.&lt;/P&gt;&lt;P&gt;Here is full boot log (attached boot-log.txt) with debug level traces enabled, DDR_DEBUG and DDR_PHY_DEBUG options are also enabled.&lt;/P&gt;</description>
      <pubDate>Thu, 06 Jun 2024 04:28:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LX2160-two-1-Rank-DDR4-DIMM-modules-with-one-memory-controller/m-p/1882317#M14412</guid>
      <dc:creator>o_m_v</dc:creator>
      <dc:date>2024-06-06T04:28:29Z</dc:date>
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    <item>
      <title>Re: LX2160 two 1-Rank DDR4 DIMM modules with one memory controller (MC1)</title>
      <link>https://community.nxp.com/t5/Layerscape/LX2160-two-1-Rank-DDR4-DIMM-modules-with-one-memory-controller/m-p/1884661#M14420</link>
      <description>&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;" lang="en-US"&gt;Please confirm the QCVS has been done.&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;&lt;A href="https://www.nxp.com.cn/docs/en/user-guide/QCVS_DDR_User_Guide.pdf" target="_blank"&gt;&lt;SPAN&gt;QCVS_DDR_User_Guide&lt;/SPAN&gt;&lt;/A&gt;&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;" lang="en-US"&gt;Thanks&lt;/P&gt;</description>
      <pubDate>Tue, 11 Jun 2024 03:17:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LX2160-two-1-Rank-DDR4-DIMM-modules-with-one-memory-controller/m-p/1884661#M14420</guid>
      <dc:creator>June_Lu</dc:creator>
      <dc:date>2024-06-11T03:17:12Z</dc:date>
    </item>
    <item>
      <title>Re: LX2160 two 1-Rank DDR4 DIMM modules with one memory controller (MC1)</title>
      <link>https://community.nxp.com/t5/Layerscape/LX2160-two-1-Rank-DDR4-DIMM-modules-with-one-memory-controller/m-p/1884823#M14421</link>
      <description>&lt;P&gt;&lt;SPAN&gt;Yes, we already used QCVS DDR tool in Code Warrior, it allowed us to improve DDR eye diagrams. &lt;/SPAN&gt;&lt;SPAN&gt;DDR memory seems to work stable after these adjustments. &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;The problem is that if we use two 1R DIMM modules in one MC, we get an "Invalid cs_in_use value" error during boot and only one of the two 1R modules seems to be active. &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;If we use two 2R modules in one MC, there are no problems or errors during boot and both modules are active.&lt;BR /&gt;&lt;BR /&gt;We want to know if two 1R DIMM modules on one MC is a valid configuration or not.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 11 Jun 2024 06:49:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LX2160-two-1-Rank-DDR4-DIMM-modules-with-one-memory-controller/m-p/1884823#M14421</guid>
      <dc:creator>o_m_v</dc:creator>
      <dc:date>2024-06-11T06:49:09Z</dc:date>
    </item>
    <item>
      <title>Re: LX2160 two 1-Rank DDR4 DIMM modules with one memory controller (MC1)</title>
      <link>https://community.nxp.com/t5/Layerscape/LX2160-two-1-Rank-DDR4-DIMM-modules-with-one-memory-controller/m-p/1888326#M14437</link>
      <description>&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;&lt;SPAN&gt;U&lt;/SPAN&gt;&lt;SPAN&gt;sing two 1-rank DDR4 DIMM on LX2160A may be possible, but it has not be validated and we don't have supported configuration.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;&lt;SPAN&gt;Y&lt;/SPAN&gt;&lt;SPAN&gt;ou may try it and see if you can get it to work using the QCVS tool. but we cannot guarantee it because it is not a supported configuration. &lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 17 Jun 2024 03:11:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LX2160-two-1-Rank-DDR4-DIMM-modules-with-one-memory-controller/m-p/1888326#M14437</guid>
      <dc:creator>June_Lu</dc:creator>
      <dc:date>2024-06-17T03:11:33Z</dc:date>
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