LX2160 DDR training fail ISSUE

zeeetor — Tue, 23 Apr 2024 07:06:34 GMT

Hi NXP,

We produce a board using LX2160

DDR CONTROLLER1: 4*16 + 1*16(ECC), all there ddr_module share one CS & CKE

CONTROLLER2: 4*16 + 1*16(ECC), all there ddr_module share one CS & CKE

DDR PLL freq is 3200MHz & DDR freq is 1600MHz

From bl2 log, it seems that ddr training is fail

Is there anything I should check?

INFO: Index = 0 with loc_nod=13 and input nod=13
INFO: Index = 0 with loc_nod=13 and input nod=13
INFO: Index = 0 with loc_nod=13 and input nod=30
INFO: Index = 1 with loc_nod=30 and input nod=30
INFO: Index = 0 with loc_nod=13 and input nod=30
INFO: Index = 1 with loc_nod=30 and input nod=30
INFO: Index = 0 with loc_nod=13 and input nod=13
INFO: Index = 0 with loc_nod=13 and input nod=13
INFO: Index = 0 with loc_nod=13 and input nod=30
INFO: Index = 1 with loc_nod=30 and input nod=30
INFO: Index = 0 with loc_nod=13 and input nod=30
INFO: Index = 1 with loc_nod=30 and input nod=30
INFO: Index = 0 with loc_nod=13 and input nod=13
INFO: Index = 0 with loc_nod=13 and input nod=13
INFO: Index = 0 with loc_nod=13 and input nod=30
INFO: Index = 1 with loc_nod=30 and input nod=30
INFO: Index = 0 with loc_nod=13 and input nod=30
INFO: Index = 1 with loc_nod=30 and input nod=30
INFO: Index = 0 with loc_nod=13 and input nod=13
INFO: Index = 0 with loc_nod=13 and input nod=13
INFO: Index = 0 with loc_nod=13 and input nod=30
INFO: Index = 1 with loc_nod=30 and input nod=30
INFO: Index = 0 with loc_nod=13 and input nod=30
INFO: Index = 1 with loc_nod=30 and input nod=30
INFO: Index = 0 with loc_nod=4 and input nod=17
INFO: Index = 1 with loc_nod=7 and input nod=17
INFO: Index = 2 with loc_nod=10 and input nod=17
INFO: Index = 3 with loc_nod=17 and input nod=17
INFO: Index = 0 with loc_nod=4 and input nod=17
INFO: Index = 1 with loc_nod=7 and input nod=17
INFO: Index = 2 with loc_nod=10 and input nod=17
INFO: Index = 3 with loc_nod=17 and input nod=17
INFO: RCW BOOT SRC is SD
INFO: SoC workaround for Errata A050426 was applied
INFO: SoC workaround for DDR Errata A011396 was applied
INFO: SoC workaround for DDR Errata A050450 was applied
INFO: SoC workaround for DDR Errata A050958 was applied
INFO: RCW BOOT SRC is SD
INFO: esdhc_emmc_init
INFO: Card detected successfully
INFO: init done:
INFO: Flexspi driver: Version v1.0
INFO: Flexspi: Default MCR0 = 0xffff80c0, before reset
INFO: Flexspi: After MCR0 = 0xffff0000,
INFO: Flexspi: Init done!!
INFO: F_SECTOR_ERASE_SZ: 0x00020000, num_sector: 1
INFO: In [fspi_sec_er][755] Erase address 0xc0000
NOTICE: BL2: v2.4(release):LSDK-21.08-1-g3875a8de3-dirty
NOTICE: BL2: Built : 14:09:43, Apr 23 2024
INFO: platform clock 750000000
INFO: DDR PLL1 3200000000
INFO: DDR PLL2 3200000000
INFO: frequency = 1600MHz
INFO: Vref_phy = 75 percent
INFO: Initializing input adv data structure
INFO: mr[0] = 0x210
INFO: mr[1] = 0x101
INFO: mr[2] = 0x0
INFO: mr[3] = 0x0
INFO: mr[4] = 0x0
INFO: mr[5] = 0x0
INFO: mr[6] = 0x0
INFO: input->cs_d0 = 0x3
INFO: input->cs_d1 = 0x0
INFO: input->mirror = 0x0
INFO: PHY ODT impedance = 48 ohm
INFO: PHY DQ driver impedance = 48 ohm
INFO: PHY Addr driver impedance = 30 ohm
INFO: odt[0] = 0x1
INFO: odt[1] = 0x2
INFO: odt[2] = 0x0
INFO: odt[3] = 0x0
INFO: Initializing message block
INFO: msg_blk->dram_type = 0x2
INFO: msg_blk->sequence_ctrl = 0x31f
INFO: msg_blk->phy_cfg = 0x0
INFO: msg_blk->x16present = 0x3
INFO: msg_blk->dramfreq = 0xc80
INFO: msg_blk->pll_bypass_en = 0x0
INFO: msg_blk->dfi_freq_ratio = 0x2
INFO: msg_blk->phy_odt_impedance = 0x0
INFO: msg_blk->phy_drv_impedance = 0x0
INFO: msg_blk->bpznres_val = 0x0
INFO: msg_blk->enabled_dqs = 0x40
INFO: msg_blk->acsm_odt_ctrl0 = 0x1
INFO: msg_blk->acsm_odt_ctrl1 = 0x2
INFO: msg_blk->acsm_odt_ctrl2 = 0x0
INFO: msg_blk->acsm_odt_ctrl3 = 0x0
INFO: rx2d_train_opt 0, tx2d_train_opt 0
INFO: Initialize PHY 0 config
INFO: pll_ctrl2 = 0x19
INFO: SOC_SI_REV = 2
INFO: dll_lck_param = 0x212
INFO: dll_gain_ctl = 0x61
INFO: prog_acx4_anib_dis 0x0
INFO: Initialize PHY 1 config
INFO: pll_ctrl2 = 0x19
INFO: SOC_SI_REV = 2
INFO: dll_lck_param = 0x212
INFO: dll_gain_ctl = 0x61
INFO: prog_acx4_anib_dis 0x0
NOTICE: DDR PMU Hardware version-0x1210
INFO: Load 1D firmware
INFO: sd-mmc read done.
INFO: sd-mmc read done.
INFO: sd-mmc read done.
INFO: Loading image id=33 at address 0x18003000
INFO: sd-mmc read done.
INFO: Image id=33 loaded: 0x18003000 - 0x18009bd0
INFO: Loaded Imaged id 33 of size 6bd0 at address 18003000
INFO: sd-mmc read done.
INFO: sd-mmc read done.
INFO: sd-mmc read done.
INFO: sd-mmc read done.
INFO: sd-mmc read done.
INFO: sd-mmc read done.
INFO: sd-mmc read done.
INFO: Loading image id=35 at address 0x18003000
INFO: sd-mmc read done.
INFO: Image id=35 loaded: 0x18003000 - 0x180036d0
INFO: Loaded Imaged id 35 of size 6d0 at address 18003000
INFO: Execute firmware
INFO: Applying PLL optimal settings
INFO: pll_ctrl2 = 0x19
INFO: pll_ctrl1 = 0x21
INFO: pll_test_mode = 0x24
INFO: pll_ctrl4 = 0x17f
NOTICE: DDR PMU Firmware vision-0x1001 (vA-2019.04)
INFO: End of initialization
INFO: End of read enable training
INFO: End of fine write leveling
INFO: 1D Training failure
INFO: Applying PLL optimal settings
INFO: pll_ctrl2 = 0x19
INFO: pll_ctrl1 = 0x21
INFO: pll_test_mode = 0x24
INFO: pll_ctrl4 = 0x17f
INFO: End of initialization
INFO: 1D Training failure
ERROR: Execution FW failed (error code -5)
Error - Invalid cs_in_use value
INFO: CDD rrmax 7 wwmax 7 rwmax f wrmax 7
INFO: Time before programming controller 357 ms
INFO: Program controller registers
PHY handshake timeout, ddr_dsr2 = 0
INFO: total size 16 GB
INFO: Need to wait up to 2680 ms
ERROR: Found training error(s): 0x100
ERROR: Error: Waiting for D_INIT timeout.
ERROR: Writing DDR register(s) failed
ERROR: Programing DDRC error
ERROR: DDR init failed.
NOTICE: Incorrect DRAM0 size is defined in platform_def.h
INFO: DDR Controller 1.
INFO: Configuring TrustZone Controller
INFO: Configuring TrustZone Controller
INFO: DDR Controller 2.
INFO: Configuring TrustZone Controller
INFO: Configuring TrustZone Controller
INFO: BL2: Doing platform setup
INFO: BL2: Loading image id 3
INFO: sd-mmc read done.
INFO: sd-mmc read done.
INFO: sd-mmc read done.
INFO: Loading image id=3 at address 0xfbe00000
INFO: sd-mmc read done.

Re: LX2160 DDR training fail ISSUE

zeeetor — Wed, 24 Apr 2024 01:26:53 GMT

Problem solved!

CONFIG_STATIC_DDR = 0

CONFIG_DDR_NODIMM = 1

Fill in ddr_raw_timing with parameters according to ddr spec.

Re: LX2160 DDR training fail ISSUE

Nikhiln — Thu, 01 Aug 2024 16:54:43 GMT

Hi have the similar issue.

Where I have to add these parameters?

Are you using LSDK for building the images or any other method?

Also, which all files I need to modify for DDR configurations?

Thanks

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LX2160 DDR training fail ISSUE

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Re: LX2160 DDR training fail ISSUE