LayerscapeのトピックRe: bringing up LS1088A custom board

bringing up LS1088A custom board

p_dembicki — Fri, 09 Feb 2024 14:57:43 GMT

Hi everybody,

I'm struggling with custom LS1088A board. It has ddr4 module (so-dimm in my case) and it use only one diff clock: 100Mhz. There no additional clocks for DDR or SERDES. I try to boot it from SD-CARD.

My problem is simple: board cannot start. Please look at screen:

Yellow is PORESET_B, Blue is HRESET_B, Green is RESETREQ_B and pink is ASLEEP. All signals are pulled up.

Second image:

Green RESET_REQ_B, blue HRESET_B, pink SDCARD_D0, yellow SD_CARD_CMD.

It looks like cpu fail at 18 step of Power-On Reset Sequence. And I can't force it to start up.

My RCW settings:

#include <ls1088rdb.rcwi> SYS_PLL_RAT=5 MEM_PLL_RAT=16 CGA_PLL1_RAT=12 CGA_PLL2_RAT=12 HWA_CGA_M1_CLK_SEL=2 HWA_CGA_M2_CLK_SEL=1 DDR_REFCLK_SEL=2 DRAM_LAT=1 BOOT_LOC=21 FLASH_MODE=0x2 SYSCLK_FREQ=0x258 IIC3_EXT=1 UART_BASE=3 IIC2_BASE=2 IIC3_BASE=1 IIC4_BASE=1 IFC_GRP_A_BASE=3 IFC_GRP_FGHI_BASE=1 EC1=1 EC2=1 USB1_CLK_FSEL=39 USB2_CLK_FSEL=39 SRDS_PLL_PD_PLL2=1 SRDS_PLL_PD_PLL4=1 SRDS_PRTCL_S1_LN0=3 SRDS_PRTCL_S1_LN1=3 SRDS_PRTCL_S1_LN2=4 SRDS_PRTCL_S1_LN3=4 SRDS_PRTCL_S2_LN0=5 SRDS_PRTCL_S2_LN1=5 SRDS_PRTCL_S2_LN2=7 SRDS_PRTCL_S2_LN3=7 SRDS_DIV_PEX_S2=2 SRDS_S1_REFCLK_SRC_SEL=3 SRDS_S2_REFCLK_SRC_SEL=3 .pbi blockcopy 0x40,0x00100000,0x1800a000,0x00015000 .end #include <bootlocptr_sdhc.rcw> #include <a009102_single.rcw> #include <a010554_single.rcw> #include <a009531.rcw> #include <tcpz_nosecure_region.rcw> /* CRC and Stop command (CRC 0x90c59bb0)*/

SD-Card with the same image boot inserted to LS1088A-RDB.

My question is:
What could be wrong?
How can I debug that issue?
Could You help me please?

BR,
Pawel

Re: bringing up LS1088A custom board

LFGP — Tue, 13 Feb 2024 13:57:54 GMT

there's could be several thing to provoque DDR issues, please use the next link in order to get the check list for DDR,

https://community.nxp.com/pwmxy87654/attachments/pwmxy87654/imx-processors/188384/1/AN5097.pdf

Majority of the customer DDR issues can be resolved by:
• Schematics review for any errors
• Verify DRAM reset signal is correct
• Use the QCVS tool to generate and validate DDR
• Verify DQ mapping is correct
• Verify write leveling by entering correct CLK to DQS skew in QCVS
tool

also please check the doc in the next link,

https://community.nxp.com/pwmxy87654/attachments/pwmxy87654/tech-days/289/1/AMF-NET-T3267.pdf

Re: bringing up LS1088A custom board

p_dembicki — Thu, 15 Feb 2024 14:48:58 GMT

Thank you for the interesting topic.

I tried to bring up the devboard with an unconnected DDR4 UDIMM, and it started. After that, it displayed an SPD read error on the console and froze. However, it did start. My board didn't display anything on the console and remained in the ASLEEP state.

So, my board with the same image should output something on the serial console, but it remained silent.

Re: bringing up LS1088A custom board

LFGP — Wed, 21 Feb 2024 17:48:22 GMT

The problem is in RAM, please be sure the DDRA SODIMM is supported and double check signals and clocks you are using.

The frozen issue is due some problem in RAM.

Re: bringing up LS1088A custom board

LFGP — Wed, 21 Feb 2024 17:49:30 GMT

The problem is in RAM, please be sure the DDRA SODIMM is supported and double check signals and clocks you are using.

The frozen issue is due some problem in RAM.

Re: bringing up LS1088A custom board

p_dembicki — Thu, 29 Feb 2024 14:33:01 GMT

Please advise: How can I adjust the CodeWarrior init script to utilize DIFF_SYSCLK as the DDR source clock in safeRCW mode? I use DIFF_SYSCLK as only source clock for everything.

At this moment my init script fail in safercw mode:
"Failed to write memory at address 0x70007002c on core CortexA53#0."

Re: bringing up LS1088A custom board

p_dembicki — Mon, 03 Jun 2024 11:05:00 GMT

I left information here for everyone, who will have the same problem.

LS1088AXN7Q1A does not include the SEC block. My PBI file included the generation of a CRC that is not supported on non-crypto processors. It's described in LS1088ACE (A-010160).
After disabling CRC in the PBI phase, everything started working. I was able to adjust the DDR configuration and run the bootloader.