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    <title>LayerscapeのトピックRe: LS1046ARDB RTIC Throttle value</title>
    <link>https://community.nxp.com/t5/Layerscape/LS1046ARDB-RTIC-Throttle-value/m-p/1770330#M13729</link>
    <description>&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;&lt;SPAN&gt;Definition and usage of RTIC Throttle (RTHR) is defined in the&lt;/SPAN&gt; &lt;A href="https://www.nxp.com/docs/en/reference-manual/LS1046ASECRM.pdf" target="_blank"&gt;&lt;SPAN&gt;LS1046A Security (SEC) Reference Manual&lt;/SPAN&gt;&lt;/A&gt;&lt;SPAN&gt;.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;12.1.3 RTIC use of the Throttle Register&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;The RTIC scan rate is controlled using the Throttle Register. This allows the user to trade off the software image revalidation rate against memory bandwidth utilization. Depending on the settings, the software image might be revalidated every few seconds or every few days. RTIC also implements a watchdog timer that can be used to ensure that an attacker isn't able to block RTIC's access to memory for an extended period of time. If a DMA read error, illegal address/length error, RTIC Watchdog time-out, or hash mismatch occurs, the RTIC enters an error state and signals a security violation. A hardware reset is required to resume operation.&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;&amp;nbsp;&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;To set the RTHR, refers to:&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;13.150 RTIC Throttle Register (RTHR)&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;...&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;13.150.2 Function&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;The Run Time Integrity Checking Throttle Register can be set to specify how many clock&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;cycles to wait between RTIC hashing operations when RTIC is in run-time mode. The&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;register becomes read-only when RTIC is in run-time mode.&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;...&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;Field 31-0 RTHR&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;Function: Run Time Mode DMA Throttle. Programmable Timer that can be set to specify how many cycles of the system clock to wait between RTIC hashing operations during run time mode. At boot time, this register would generally be set to a value that will allow all four memory blocks to be hashed in a reasonable time without high bus utilization.&lt;/P&gt;</description>
    <pubDate>Thu, 07 Dec 2023 02:29:06 GMT</pubDate>
    <dc:creator>June_Lu</dc:creator>
    <dc:date>2023-12-07T02:29:06Z</dc:date>
    <item>
      <title>LS1046ARDB RTIC Throttle value</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1046ARDB-RTIC-Throttle-value/m-p/1769138#M13726</link>
      <description>&lt;P&gt;Hi ,&lt;BR /&gt;&lt;BR /&gt;I have configured RTIC and as suggested Have&amp;nbsp;&lt;SPAN&gt;&amp;nbsp;RTIC Throttle (RTHR) at 0x176001c to 0xff000000.&lt;BR /&gt;&lt;BR /&gt;I want to know what does 0xff000000 means?&lt;BR /&gt;Any information would be appreciated.&lt;BR /&gt;&lt;BR /&gt;Thanks,&lt;BR /&gt;Faizan&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 05 Dec 2023 15:27:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1046ARDB-RTIC-Throttle-value/m-p/1769138#M13726</guid>
      <dc:creator>Faizanbaig</dc:creator>
      <dc:date>2023-12-05T15:27:41Z</dc:date>
    </item>
    <item>
      <title>Re: LS1046ARDB RTIC Throttle value</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1046ARDB-RTIC-Throttle-value/m-p/1770330#M13729</link>
      <description>&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;&lt;SPAN&gt;Definition and usage of RTIC Throttle (RTHR) is defined in the&lt;/SPAN&gt; &lt;A href="https://www.nxp.com/docs/en/reference-manual/LS1046ASECRM.pdf" target="_blank"&gt;&lt;SPAN&gt;LS1046A Security (SEC) Reference Manual&lt;/SPAN&gt;&lt;/A&gt;&lt;SPAN&gt;.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;12.1.3 RTIC use of the Throttle Register&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;The RTIC scan rate is controlled using the Throttle Register. This allows the user to trade off the software image revalidation rate against memory bandwidth utilization. Depending on the settings, the software image might be revalidated every few seconds or every few days. RTIC also implements a watchdog timer that can be used to ensure that an attacker isn't able to block RTIC's access to memory for an extended period of time. If a DMA read error, illegal address/length error, RTIC Watchdog time-out, or hash mismatch occurs, the RTIC enters an error state and signals a security violation. A hardware reset is required to resume operation.&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;&amp;nbsp;&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;To set the RTHR, refers to:&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;13.150 RTIC Throttle Register (RTHR)&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;...&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;13.150.2 Function&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;The Run Time Integrity Checking Throttle Register can be set to specify how many clock&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;cycles to wait between RTIC hashing operations when RTIC is in run-time mode. The&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;register becomes read-only when RTIC is in run-time mode.&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;...&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;Field 31-0 RTHR&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;Function: Run Time Mode DMA Throttle. Programmable Timer that can be set to specify how many cycles of the system clock to wait between RTIC hashing operations during run time mode. At boot time, this register would generally be set to a value that will allow all four memory blocks to be hashed in a reasonable time without high bus utilization.&lt;/P&gt;</description>
      <pubDate>Thu, 07 Dec 2023 02:29:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1046ARDB-RTIC-Throttle-value/m-p/1770330#M13729</guid>
      <dc:creator>June_Lu</dc:creator>
      <dc:date>2023-12-07T02:29:06Z</dc:date>
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