topic Re: LS1088A PLL register documentation in Layerscape

LS1088A PLL register documentation

Akshay_Redekar — Fri, 03 Nov 2023 15:16:23 GMT

I'm working on LS1088A processor to configure the clock driver for it. I don't see registers "PLL cluster n general status register (Clocking_PLLC1GSR/Clocking_PLLC2GSR/Clocking_PLLPGSR)" in LS1088A RM. As those registers were present under LS1046A RM with detail clocking memory map (along with offsets).
Where can I find the documentation for PLL1/PLL2/PPLL registers for LS1088A ? Also same observed for LS1028A also.

Currently I used offsets for above registers for LS1088A as per https://github.com/torvalds/linux/blob/master/drivers/clk/clk-qoriq.c. I'm using below multiplier mask -

/// PLL [core] cluster multiplier mask. CGA_PLL1_RAT for LS1028A/LS1088A
#define CG_LS_PLL1C_MULT_MASK (0x1FE00000U)

/// PLL [core] cluster multiplier mask. CGA_PLL2_RAT for LS1028A/LS1088A
#define CG_LS_PLL2C_MULT_MASK (0x000001FEU)

/// Platform PLL multiplier mask. SYS_PLL_RAT for LS1028A/LS1088A
#define CG_LS_PLLP_MULT_MASK (0x7E000000U)

I'm getting issues with boot up in that case for LS1088A. Can someone suggest if the masks used are correct as no documentation available for these in case of LS1028A/LS1088A. PLL [core] cluster multiplier mask 8 BIT and Platform PLL multiplier mask 6 BIT values will be used as per RCW register configuration.

Re: LS1088A PLL register documentation

SebastianG — Mon, 06 Nov 2023 14:16:28 GMT

Hello @Akshay_Redekar

I would like to inform you that I'm working on your question, I will let you know as soon as I have an update.

Thank you so much for your patience

Regards,

Sebastian

Re: LS1088A PLL register documentation

SebastianG — Wed, 22 Nov 2023 18:52:36 GMT

Hi @Akshay_Redekar,

Apologies for the delayed response

The masks/// PLL cluster multiplier mask [core]. CGA_PLL1_RAT for LS1028A/LS1088A
#define CG_LS_PLL1C_MULT_MASK (0x1FE00000U)

/// PLL cluster multiplier mask [core]. CGA_PLL2_RAT for LS1028A/LS1088A
#define CG_LS_PLL2C_MULT_MASK (0x000001FEU)

/// Platform PLL multiplier mask. SYS_PLL_RAT for LS1028A/LS1088A
#define CG_LS_PLLP_MULT_MASK (0x7E000000U)

They look correct for use with these registers