Central Security Register on LS1046ardb

yuji2yuji — Thu, 21 Sep 2023 05:45:07 GMT

Hello folks,

I'd like to configure TZASC at runtime.

To do so, I might need to clear the Secure Access Register, which might be available on the Central Security Unit (CSU).

I found some code that seems to configure it in arm trusted firmware (atf).

- enable_layerscape_ns_access(ns_dev, ARRAY_SIZE(ns_dev), NXP_CSU_ADDR).

- According to the source code, that NXP_CSU_ADDR is 0x01510000

- In the ls1043 sources, I found #define CSU_SEC_ACCESS_REG_OFFSET 0x21C . Is the mapping the same in the ls1046? Even if it is, detailed map and configuration information is required for its proper setup.

Besides, I've checked the document "QorIQ LS1046A Security (SEC)" but I cannot find the CSU information from it.

Anybody who knows the information, help me.

Re: Central Security Register on LS1046ardb

yipingwang — Wed, 27 Sep 2023 02:21:17 GMT

The map is same for ls1046a.

For details, please refer to section "7.1.1.2 Secure Access register (CSU_SAn)" in LS1046A Reference Manual.

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Central Security Register on LS1046ardb

Re: Central Security Register on LS1046ardb