topic Re: LS1020A DDR controller Test in Layerscape

LS1020A DDR controller Test

jasonhendrix — Tue, 14 Jun 2016 18:47:55 GMT

How can I test my DDR using the built-in DDR test in the LS1020A DDR controller?

Hi,

I'm trying to run the "automatic memory test" on my DDR by setting up the DDR Ctrl registers. My first attempt was to set DDR_MTCR[MT_EN] = 1, all other fields in DDR_MTCR were 0. To my understanding, this should write to all of DDR as specified by CS0_BNDS = 0x008000FF, then read it back. The test fails immediately, but nothing has been written (and definitely not the entire space). Why is it failing before even writing?

I also tried setting the test address range, with the same results: (DDR_MTCR[MT_ADDR_EN] = 1, DDR_MT_ST_ADDR = 0x80000000 and DDR_MT_ENDADDR = 0x81000000.

I did clear the status bit before running each time.

Re: LS1020A DDR controller Test

addiyi — Wed, 15 Jun 2016 06:30:42 GMT

The easiest way to test DDR configuration is to use DDRv tool included in QCVS.

Adrian

Re: LS1020A DDR controller Test

jasonhendrix — Wed, 15 Jun 2016 06:48:11 GMT

Thanks Adrian, we're using that as well. Does the DDR Test in the ddr controller work? I would like to see the results of RAM after it writes.

Re: LS1020A DDR controller Test

addiyi — Wed, 15 Jun 2016 06:59:49 GMT

Using DDRv, you can choose:

- BIST tests, which are the DDR controller build in tests and will test all the memory using only the controller

- DMA test

- WRC, WO, WZ, which allow you to set the pattern, the size and the start address

- Custom test, which allow you to customize the DDR test

If all the tests from Operational DDR tests are passing, this means your DDR configuration is valid. Starting with this configuration you can run the other validation tests to get the best DDR configuration.

Adrian