https://community.nxp.com/t5/Layerscape/Query-on-LX2160A-SERDES-Pin-mapping/m-p/1672992#M12702 <P><SPAN>We are using LX210A Processor in our design, We have connected different interfaces in the same SERDES : For Example:If we connect the PCIe on Lane 4,5, SGMII on Lane6 and SGMII on Lane 7 ,Is necessary to provide GNDS/NC in between the pins. Please suggest us the solution in detail.</SPAN></P> Tue, 20 Jun 2023 20:00:16 GMT Aathi1122000 2023-06-20T20:00:16Z https://community.nxp.com/t5/Layerscape/Query-on-LX2160A-SERDES-Pin-mapping/m-p/1672992#M12702 <P><SPAN>We are using LX210A Processor in our design, We have connected different interfaces in the same SERDES : For Example:If we connect the PCIe on Lane 4,5, SGMII on Lane6 and SGMII on Lane 7 ,Is necessary to provide GNDS/NC in between the pins. Please suggest us the solution in detail.</SPAN></P> Tue, 20 Jun 2023 20:00:16 GMT https://community.nxp.com/t5/Layerscape/Query-on-LX2160A-SERDES-Pin-mapping/m-p/1672992#M12702 Aathi1122000 2023-06-20T20:00:16Z https://community.nxp.com/t5/Layerscape/Query-on-LX2160A-SERDES-Pin-mapping/m-p/1681476#M12781 <P><SPAN>LX2160 has a fixed ball map and if there are GND or NC pins in between then use them. For not used interface, refer LX2160 design checklist for guidelines.</SPAN></P> Wed, 05 Jul 2023 01:22:31 GMT https://community.nxp.com/t5/Layerscape/Query-on-LX2160A-SERDES-Pin-mapping/m-p/1681476#M12781 yipingwang 2023-07-05T01:22:31Z