LS1046 power sequencing

WilfridBertrand — Mon, 15 May 2023 13:27:50 GMT

Hello,

I'm going to do the bring up of an LS1046 custom board.

The part 3.2 of the datasheet mention the following Power Sequencing :
1. OVDD, DVDD, LVDD, EVDD, TVDD, XVDD, AVDD_CGAn, AVDD_PLAT,
AVDD_D1, AVDD_SDn_PLL1, AVDD_SDn_PLL2, USB_HVDD. Drive
TA_PROG_SFP = GND.
• PORESET_B input must be driven asserted and held during this step.
2. VDD, SVDD, TA_BB_VDD, USB_SDVDD, USB_SVDD
• The 3.3 V (USB_HVDD) in Step 1 and 1.0 V (USB_SDVDD, USB_SVDD) in
Step 2 supplies can power up in any sequence provided all these USB supplies
ramp up within 95 ms with respect to each other.
3. G1VDD

Is there an issue or a risk to damage the processor if I power only the first sequence to check the power supplies signal integrity, and if I do the same for the second and third stage ?

Best regards,
Wilfrid

Re: LS1046 power sequencing

Chavira — Mon, 15 May 2023 14:38:57 GMT

Hi @WilfridBertrand!

Thank you for contacting NXP Support!

If you don't follow the power sequencing you can experiment with random failures or in the worst of cases damage the processor.

If you want to check by steps but in the order, I think is not dangerous for the processor, but I can't be sure of that, we don't have documentation about that.

Best Regards

Alejandro.

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LS1046 power sequencing

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