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    <title>topic Re: need help:  ls1043 DDR tuning in Layerscape</title>
    <link>https://community.nxp.com/t5/Layerscape/need-help-ls1043-DDR-tuning/m-p/1627530#M12160</link>
    <description>&lt;P&gt;This is the startup log with ECC.&lt;/P&gt;&lt;P&gt;I tried to turn off OPTEE,It will also stop at BL2.&lt;/P&gt;</description>
    <pubDate>Tue, 04 Apr 2023 09:01:14 GMT</pubDate>
    <dc:creator>Hmc510</dc:creator>
    <dc:date>2023-04-04T09:01:14Z</dc:date>
    <item>
      <title>need help:  ls1043 DDR tuning</title>
      <link>https://community.nxp.com/t5/Layerscape/need-help-ls1043-DDR-tuning/m-p/1624864#M12118</link>
      <description>&lt;P&gt;soc:ls1043a&lt;/P&gt;&lt;P&gt;DDR:MT40A2G8VA-062E:B ,&amp;nbsp; x5, 4for 8GB,1 for ECC.&lt;/P&gt;&lt;P&gt;I use CW get a config files:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Hmc510_0-1680146733717.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/217014i3F4C0987B05489DD/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Hmc510_0-1680146733717.png" alt="Hmc510_0-1680146733717.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I tried two files to generate img&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Hmc510_1-1680146792976.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/217015iA3E8C8F9B5406DB9/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Hmc510_1-1680146792976.png" alt="Hmc510_1-1680146792976.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;They all have problems running at BL2:&lt;/P&gt;&lt;P&gt;to use (0-2GB) DDR&amp;nbsp;Data appears incorrect: (write ≠ read)&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Hmc510_2-1680146840517.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/217016iE53A04D1E0B2F753/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Hmc510_2-1680146840517.png" alt="Hmc510_2-1680146840517.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;How should I solve it? Thanks&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 30 Mar 2023 03:29:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/need-help-ls1043-DDR-tuning/m-p/1624864#M12118</guid>
      <dc:creator>Hmc510</dc:creator>
      <dc:date>2023-03-30T03:29:27Z</dc:date>
    </item>
    <item>
      <title>回复： need help:  ls1043 DDR tuning</title>
      <link>https://community.nxp.com/t5/Layerscape/need-help-ls1043-DDR-tuning/m-p/1624877#M12119</link>
      <description>&lt;P&gt;and CW test 0~2G is good :&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Hmc510_0-1680148153652.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/217017iABD253FF8E2A89CA/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Hmc510_0-1680148153652.png" alt="Hmc510_0-1680148153652.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 30 Mar 2023 04:51:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/need-help-ls1043-DDR-tuning/m-p/1624877#M12119</guid>
      <dc:creator>Hmc510</dc:creator>
      <dc:date>2023-03-30T04:51:51Z</dc:date>
    </item>
    <item>
      <title>回复： need help:  ls1043 DDR tuning</title>
      <link>https://community.nxp.com/t5/Layerscape/need-help-ls1043-DDR-tuning/m-p/1625903#M12126</link>
      <description>&lt;P&gt;DDR PCB:&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;P05-DDR4.pdf&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;DDR 2G8 &lt;SPAN&gt;datasheet&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;MT40A2G8VA-062E:B:&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;MICT_S_A0010972464_1-2574446.pdf&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;Information supplement：&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;I modified the ATF code to test the DDR:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;write data to 1K memory and then read back for verification. two messages were found:&lt;/SPAN&gt;&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;&lt;SPAN class=""&gt;Some bits have changed&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN class=""&gt;CW read back data appears to be correct and ATF crc notify NG...(I'm sure there's no dizziness)&lt;/SPAN&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Hmc510_1-1680252520185.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/217286i54FB93B5FEEF6CCC/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Hmc510_1-1680252520185.png" alt="Hmc510_1-1680252520185.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Hmc510_0-1680253294093.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/217293iA171D240265723CF/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Hmc510_0-1680253294093.png" alt="Hmc510_0-1680253294093.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 31 Mar 2023 09:01:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/need-help-ls1043-DDR-tuning/m-p/1625903#M12126</guid>
      <dc:creator>Hmc510</dc:creator>
      <dc:date>2023-03-31T09:01:44Z</dc:date>
    </item>
    <item>
      <title>回复： need help:  ls1043 DDR tuning</title>
      <link>https://community.nxp.com/t5/Layerscape/need-help-ls1043-DDR-tuning/m-p/1625948#M12127</link>
      <description>&lt;P&gt;about&amp;nbsp;MT40A2G8VA-062E:B&amp;nbsp;I found a total of two documents online:&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;16gb_ddr4_x4x8_2cs_twindie.pdf&amp;nbsp;&amp;nbsp;MICT_S_A0010972464_1-2574446.pdf&lt;/STRONG&gt;&lt;/P&gt;</description>
      <pubDate>Fri, 31 Mar 2023 09:24:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/need-help-ls1043-DDR-tuning/m-p/1625948#M12127</guid>
      <dc:creator>Hmc510</dc:creator>
      <dc:date>2023-03-31T09:24:26Z</dc:date>
    </item>
    <item>
      <title>Re: need help:  ls1043 DDR tuning</title>
      <link>https://community.nxp.com/t5/Layerscape/need-help-ls1043-DDR-tuning/m-p/1627356#M12151</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/209457"&gt;@Hmc510&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Can you please perform below validation with QCVS DDR tool.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;1. Centering The Clock&lt;/P&gt;
&lt;P&gt;2. Read ODT and Driver&lt;/P&gt;
&lt;P&gt;3. Write ODT and Driver&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Thanks&lt;/P&gt;
&lt;P&gt;Khushbu&lt;/P&gt;</description>
      <pubDate>Tue, 04 Apr 2023 06:23:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/need-help-ls1043-DDR-tuning/m-p/1627356#M12151</guid>
      <dc:creator>khushbur</dc:creator>
      <dc:date>2023-04-04T06:23:17Z</dc:date>
    </item>
    <item>
      <title>Re: need help:  ls1043 DDR tuning</title>
      <link>https://community.nxp.com/t5/Layerscape/need-help-ls1043-DDR-tuning/m-p/1627392#M12154</link>
      <description>&lt;P&gt;Yes, they all seem to have turned out very successful.&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;And I removed ECC(U20 &amp;amp; R146) chip from the board.Close ECC and regenerate configuration parameters; Still down in BL2.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;And&amp;nbsp;I tried the following CW configuration:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;4GB: 1G8、&lt;/SPAN&gt;&lt;SPAN&gt;8GB: 2G8.They all tested CW normally,hang up at BL2.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Hmc510_0-1680590904556.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/217641i800D90F0DD990879/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Hmc510_0-1680590904556.png" alt="Hmc510_0-1680590904556.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Hmc510_1-1680590967253.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/217642i78C09A89483AF7AE/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Hmc510_1-1680590967253.png" alt="Hmc510_1-1680590967253.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Hmc510_2-1680590975517.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/217643i9BF1B2DBD1CCC0AA/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Hmc510_2-1680590975517.png" alt="Hmc510_2-1680590975517.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 04 Apr 2023 06:53:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/need-help-ls1043-DDR-tuning/m-p/1627392#M12154</guid>
      <dc:creator>Hmc510</dc:creator>
      <dc:date>2023-04-04T06:53:32Z</dc:date>
    </item>
    <item>
      <title>回复： need help:  ls1043 DDR tuning</title>
      <link>https://community.nxp.com/t5/Layerscape/need-help-ls1043-DDR-tuning/m-p/1627419#M12156</link>
      <description>&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/208265"&gt;@khushbur&lt;/a&gt;&amp;nbsp;&amp;nbsp;This is where I obtain.CW test 0-2GB passed,The 0-2G test in BL2 is incorrect.&lt;/P&gt;&lt;P&gt;I also read back the DDRC register,They all have no problem.&lt;/P&gt;</description>
      <pubDate>Tue, 04 Apr 2023 07:13:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/need-help-ls1043-DDR-tuning/m-p/1627419#M12156</guid>
      <dc:creator>Hmc510</dc:creator>
      <dc:date>2023-04-04T07:13:22Z</dc:date>
    </item>
    <item>
      <title>Re: need help:  ls1043 DDR tuning</title>
      <link>https://community.nxp.com/t5/Layerscape/need-help-ls1043-DDR-tuning/m-p/1627523#M12159</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/209457"&gt;@Hmc510&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Can you please share boot logs in txt format.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Thanks&lt;/P&gt;
&lt;P&gt;Khushbu&lt;/P&gt;</description>
      <pubDate>Tue, 04 Apr 2023 08:52:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/need-help-ls1043-DDR-tuning/m-p/1627523#M12159</guid>
      <dc:creator>khushbur</dc:creator>
      <dc:date>2023-04-04T08:52:50Z</dc:date>
    </item>
    <item>
      <title>Re: need help:  ls1043 DDR tuning</title>
      <link>https://community.nxp.com/t5/Layerscape/need-help-ls1043-DDR-tuning/m-p/1627530#M12160</link>
      <description>&lt;P&gt;This is the startup log with ECC.&lt;/P&gt;&lt;P&gt;I tried to turn off OPTEE,It will also stop at BL2.&lt;/P&gt;</description>
      <pubDate>Tue, 04 Apr 2023 09:01:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/need-help-ls1043-DDR-tuning/m-p/1627530#M12160</guid>
      <dc:creator>Hmc510</dc:creator>
      <dc:date>2023-04-04T09:01:14Z</dc:date>
    </item>
    <item>
      <title>Re: need help:  ls1043 DDR tuning</title>
      <link>https://community.nxp.com/t5/Layerscape/need-help-ls1043-DDR-tuning/m-p/1629031#M12190</link>
      <description>&lt;P&gt;&lt;SPAN class=""&gt;Hi&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;I unexpectedly solved this problem.CPU has been adjusted from 1.6G to 1.2G,the uboot startup.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;I don't know why. SYSCLK &amp;amp; DDRCLK is 100M.&lt;/SPAN&gt;&lt;/P&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Hmc510_1-1680777117373.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/218074i074906C3B7A82E6C/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Hmc510_1-1680777117373.png" alt="Hmc510_1-1680777117373.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 06 Apr 2023 10:32:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/need-help-ls1043-DDR-tuning/m-p/1629031#M12190</guid>
      <dc:creator>Hmc510</dc:creator>
      <dc:date>2023-04-06T10:32:17Z</dc:date>
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