topic Re: LS1046A custom board LSDK21.08 RGMII and SGMII not working in Layerscape

LS1046A custom board LSDK21.08 RGMII and SGMII not working

humhh — Tue, 14 Mar 2023 16:15:09 GMT

Hello all,

we have been struggling to bring up LS1046A ethernet. The LS1046A custom board has two RGMII and one SGMII which RCW is 0x3333.

1.EC1 ---RGMII---- FM1@DTSEC3----88E1512 addr: 0 ---FSL_MDIO0:

2.EC2---RGMII---- FM1@DTSEC 4-----88E1512 addr:1 ----FSL_MDIO0:

3.SGMII.6------FM1@DTSEC 6-----88E1512 addr:0--- FM_TGEC_MDIO

in uboot SGMII.6 can't be connected.

Could not get PHY for FM_TGEC_MDIO: addr 0

Failed to connect

but fm1-mac3 or fm1-mac4 can't success ping, the EC1-CLK125M or EC2-CLK125M is all normal and can watch on oscilloscope. And the two 88e1512 all operate correct and link status is also ok.

=> ping 192.168.1.1

Could not get PHY for mdio@fd000: addr 0

Using fm1-mac3 device

ARP Retry count exceeded; starting again

ping failed; host 192.168.1.1 is not alive

=> ping 192.168.1.1

Using fm1-mac3 device

fm1-mac3: Tx error, txbd->status = 0x8800

fm1-mac3: Tx buffer not ready, txbd->status = 0x8800

fm1-mac3: Tx buffer not ready, txbd->status = 0x8800

fm1-mac3: Tx buffer not ready, txbd->status = 0x8800

ARP Retry count exceeded; starting again

ping failed; host 192.168.1.1 is not alive

=> mii device

MII devices: 'mdio@fc000' 'mdio@eb000' 'mdio@fd000'

Current device: 'mdio@fc000'

=> mdio list

mdio@fc000:

0 - Marvell 88E151x <--> fm1-mac3

1 - Marvell 88E151x <--> fm1-mac4

mdio@eb000:

mdio@fd000:

mdio@e1000:

mdio@e3000:

mdio@e5000:

mdio@e7000:

mdio@e9000:

mdio@f1000:

mdio@f3000:

in linux kernel, SGMII.6 also can't be connected.And fm1-mac3 or fm1-mac4 can't send or receive packets when in 1000Mbps ,but it can receive correct packets from ethernet in 100Mbps.

root@localhost:/test/misc_test/miitool# ifconfig

fm1-mac3: flags=4163<UP,BROADCAST,RUNNING,MULTICAST>  mtu 1500

        inet 192.168.1.130  netmask 255.255.255.0  broadcast 192.168.1.255

        inet6 fe80::48ce:34ff:fe2b:58e8  prefixlen 64  scopeid 0x20<link>

        ether 4a:ce:34:2b:58:e8  txqueuelen 1000  (Ethernet)

        RX packets 0  bytes 0 (0.0 B)

        RX errors 17  dropped 0  overruns 0  frame 0

        TX packets 35  bytes 4288 (4.2 KB)

        TX errors 0  dropped 0 overruns 0  carrier 0  collisions 0

        device memory 0x1ae4000-1ae4fff

fm1-mac4: flags=4163<UP,BROADCAST,RUNNING,MULTICAST>  mtu 1500

        inet 192.168.1.140  netmask 255.255.255.0  broadcast 192.168.1.255

        inet6 fe80::78a8:e1ff:fe1f:a352  prefixlen 64  scopeid 0x20<link>

        ether 7a:a8:e1:1f:a3:52  txqueuelen 1000  (Ethernet)

        RX packets 0  bytes 0 (0.0 B)

        RX errors 9  dropped 0  overruns 0  frame 0

        TX packets 35  bytes 4288 (4.2 KB)

        TX errors 0  dropped 0 overruns 0  carrier 0  collisions 0

        device memory 0x1ae6000-1ae6fff

root@localhost:/test/misc_test/miitool# ethtool -S fm1-mac3

     rx dma error: 0

     rx frame physical error: 3

     rx frame size error: 6

     rx header error: 0

rx csum error: 0

root@localhost:/test/misc_test/miitool# cat /sys/class/net/fm1-mac3/mac_regs

-------

FM MAC - MEMAC -2 (0x839C5000)

----------------------------------------

0x00839C5008: 0x00020943                command_config

0x00839C500C: 0x815cca16                mac_addr0.mac_addr_l

0x00839C5010: 0x00003067                mac_addr0.mac_addr_u

0x00839C5014: 0x00002580                maxfrm

0x00839C502C: 0x00000120                hashtable_ctrl

0x00839C5040: 0x00000040                ievent

0x00839C5044: 0x0000000c                tx_ipg_length

0x00839C504C: 0x63000000                imask

0x00839C5300: 0x00005006                if_mode

0x00839C5304: 0x0000b000                if_status

0x00839C5340: 0x00000000                hg_config

Re: LS1046A custom board LSDK21.08 RGMII and SGMII not working

humhh — Wed, 15 Mar 2023 01:37:09 GMT

RGMII and SGMII are both connected to Copper port (RJ45)

Re: LS1046A custom board LSDK21.08 RGMII and SGMII not working

June_Lu — Fri, 24 Mar 2023 00:27:49 GMT

If you still need the support, any update?

Re: LS1046A custom board LSDK21.08 RGMII and SGMII not working

humhh — Thu, 30 Mar 2023 01:03:28 GMT

now we remove the EC1 at 88e1512(phy addr:0), move SGMII.6 at 88e1512(phy addr:0) from MDIO 1(tgdtsec) to MDIO 0(dtsec), the sgmii works fine now,but EC2 at 88e1512(phy addr:1) is still not working,

so the MDIO 1 only support 10G ethernet, not support RGMII or 1.25G sgmii?

Re: LS1046A custom board LSDK21.08 RGMII and SGMII not working

humhh — Thu, 30 Mar 2023 01:15:11 GMT

now we remove the EC1 at 88e1512(phy addr:0), move SGMII.6 at 88e1512(phy addr:0) from MDIO 1(tgdtsec) to MDIO 0(dtsec), the sgmii works fine now,but EC2 at 88e1512(phy addr:1) is still not working,

so the MDIO 1 only support 10G ethernet, not support RGMII or 1.25G sgmii?

Re: LS1046A custom board LSDK21.08 RGMII and SGMII not working

stadium_aquino — Fri, 31 Mar 2023 18:39:02 GMT

From the DPAA Reference Manual Table 5-17, MDIO1 (what you refer to as MDIO0) is C22 only, and MDIO2 (what you refer to as MDIO1) is C45 only.

"MDIO1 is EMI1 for Clause 22 physical interfaces (1G, 2.5G, overclocked SGMII and below). MDIO2 is EMI2 for Clause 45 physical interfaces (10G)."

Re: LS1046A custom board LSDK21.08 RGMII and SGMII not working

humhh — Sat, 01 Apr 2023 12:00:35 GMT

yes,I notice it, but some can use tgdtsec as below, so it is confusing. case 0x1133: switch (srds_s2) { case 0x5a59: /* Set the three on-board SGMII PHY address */ fm_info_set_phy_address(FM1_DTSEC6, SGMII_PHY1_ADDR); fm_info_set_phy_address(FM1_DTSEC2, SGMII_PHY2_ADDR); fm_info_set_phy_address(FM1_DTSEC5, SGMII_PHY3_ADDR); dev = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME); fm_info_set_mdio(FM1_DTSEC3, dev); fm_info_set_mdio(FM1_DTSEC4, dev); fm_info_set_mdio(FM1_DTSEC5, dev); dev = miiphy_get_dev_by_name(DEFAULT_FM_TGEC_MDIO_NAME); fm_info_set_mdio(FM1_DTSEC6, dev); fm_info_set_mdio(FM1_DTSEC2, dev); run_command("setenv product c2", 0); run_command("setenv serdes1 1133", 0); run_command("setenv serdes2 5a59", 0);

Re: LS1046A custom board LSDK21.08 RGMII and SGMII not working

humhh — Sat, 01 Apr 2023 12:16:47 GMT

yes,I notice it, but some can use tgdtsec as below, so it is confusing.

case 0x1133:
switch (srds_s2) {
case 0x5a59:
/* Set the three on-board SGMII PHY address */
fm_info_set_phy_address(FM1_DTSEC6, SGMII_PHY1_ADDR);
fm_info_set_phy_address(FM1_DTSEC2, SGMII_PHY2_ADDR);
fm_info_set_phy_address(FM1_DTSEC5, SGMII_PHY3_ADDR);

dev = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME);
fm_info_set_mdio(FM1_DTSEC3, dev);
fm_info_set_mdio(FM1_DTSEC4, dev);
fm_info_set_mdio(FM1_DTSEC5, dev);

dev = miiphy_get_dev_by_name(DEFAULT_FM_TGEC_MDIO_NAME);
fm_info_set_mdio(FM1_DTSEC6, dev);
fm_info_set_mdio(FM1_DTSEC2, dev);

run_command("setenv product c2", 0);
run_command("setenv serdes1 1133", 0);
run_command("setenv serdes2 5a59", 0);
break;
default:
printf("Invalid SerDes protocol 0x%x_0x%x for LS1046ARDB\n",
srds_s1,srds_s2);
break;

Re: LS1046A custom board LSDK21.08 RGMII and SGMII not working

June_Lu — Wed, 05 Apr 2023 10:28:14 GMT

From LS1046ADPAARMAD, Errata to LS1046A Data Path Acceleration Architecture (DPAA) Reference Manual page 501, Table 5-17 note 5, MDIO2 is EMI2 for Clause 45 physical interfaces (10G). If the PHY only supports Clause 22 MDIO register access protocol, it will not support.