topic Re: Need Help: LS1046ARDB - Tx Interrupt in IM mode in Layerscape

Need Help: LS1046ARDB - Tx Interrupt in IM mode

srak — Wed, 08 Mar 2023 07:47:43 GMT

In document, there is information about Rx interrupt (RxF Interrupt, RxBD busy Interrupt) but I could not find information on Tx interrupt. How to check for Tx complete event or Tx ready event?

Re: Need Help: LS1046ARDB - Tx Interrupt in IM mode

LFGP — Fri, 10 Mar 2023 19:08:41 GMT

if you are using LPUART you can read the field TXEMPT in the LPUART FIFO Register.

Please go to the section 24.3.7 LPUART FIFO Register (LPUARTx_FIFO) in the reference manual to get more info about it.

Re: Need Help: LS1046ARDB - Tx Interrupt in IM mode

srak — Sat, 11 Mar 2023 15:27:35 GMT

Not using LPUART. I am using Ethernet - Independent mode. Any Tx interrupt available for Ethernet?

Re: Need Help: LS1046ARDB - Tx Interrupt in IM mode

LFGP — Tue, 14 Mar 2023 17:41:28 GMT

You can use the BSY field in the FMBM_TST—Tx Status register.

Please go to the section BMI Tx Port Registers in the LS1046 DPAA reference manual, page 552

use the next link for the DPAA

https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/layerscape-processors/layerscape-1046a-and-1026a-processors:LS1046A

Re: Need Help: LS1046ARDB - Tx Interrupt in IM mode

srak — Thu, 16 Mar 2023 08:31:57 GMT

You can use theBSYfield in theFMBM_TST—Tx Statusregister.

How to enable interrupt for this field? I could not find interrupt details in document.

Re: Need Help: LS1046ARDB - Tx Interrupt in IM mode

LFGP — Mon, 03 Apr 2023 23:29:33 GMT

unfortunately there is no dedicate interrupt to handle what you want,
please follow to the next link in order to get an idea to develop your own interrupt

https://developer.arm.com/documentation/den0024/a/AArch64-Exception-Handling/Interrupt-handling