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    <title>topic Re: ls1021a IRQ connection in Layerscape</title>
    <link>https://community.nxp.com/t5/Layerscape/ls1021a-IRQ-connection/m-p/1604599#M11913</link>
    <description>&lt;P&gt;Looking at the symbol for the LS1021A, IRQ2 pin can only be an IRQ. While IRQ3 can be GPIO1_23.&lt;/P&gt;&lt;P&gt;That may mean I cannot go in GPIO mode for this pin. This is confirmed by RCW setting that only applies to IRQ3:5&lt;/P&gt;</description>
    <pubDate>Thu, 23 Feb 2023 12:58:18 GMT</pubDate>
    <dc:creator>renaud</dc:creator>
    <dc:date>2023-02-23T12:58:18Z</dc:date>
    <item>
      <title>ls1021a IRQ connection</title>
      <link>https://community.nxp.com/t5/Layerscape/ls1021a-IRQ-connection/m-p/1601267#M11875</link>
      <description>&lt;P&gt;We have a design that uses the ls1021a. There is an I2C gpio device (pca9554) connected to i2c bus 0. The IRQ from the device is connected to the CPU IRQ 2.&lt;/P&gt;&lt;P&gt;For the device tree description, I added:&lt;/P&gt;&lt;P&gt;&amp;nbsp;gpio@3a {&amp;nbsp;&lt;BR /&gt;&amp;nbsp;compatible = "pca953x,pca9554";&lt;BR /&gt;&amp;nbsp;reg = &amp;lt;0x3a&amp;gt;;&lt;BR /&gt;&amp;nbsp;gpio-cells = &amp;lt;2&amp;gt;;&lt;BR /&gt;&amp;nbsp;gpio-controller;&lt;BR /&gt;&amp;nbsp;interrupt-parent = &amp;lt;&amp;amp;gic&amp;gt;;&lt;BR /&gt;&amp;nbsp;interrupts = &amp;lt;GIC_SPI 165 IRQ_TYPE_LEVEL_LOW&amp;gt;;&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;From Linux, I see:&lt;/P&gt;&lt;P&gt;[ 0.051001] pca953x 0-003a: using no AI&lt;BR /&gt;[ 0.080652] genirq: Setting trigger mode 8 for irq 50 failed (gic_set_type+0x0/0xa0)&lt;BR /&gt;[ 0.080778] pca953x 0-003a: failed to request irq 50&lt;BR /&gt;[ 0.080811] pca953x: probe of 0-003a failed with error -22&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Is the IRQ number correct in the error message? I though, I would have got a value of 197 (165+32).&lt;/P&gt;&lt;P&gt;Looking at the code for gic_set_type, with a value of 32 or above I would be limited to&amp;nbsp;IRQ_TYPE_LEVEL_HIGH or&amp;nbsp;IRQ_TYPE_EDGE_RISING. Does that mean the IRQ from the pca9554 must&amp;nbsp; be passed in an invert gate?&lt;/P&gt;&lt;P&gt;Cheers,&lt;/P&gt;&lt;P&gt;Renaud&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 17 Feb 2023 17:24:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/ls1021a-IRQ-connection/m-p/1601267#M11875</guid>
      <dc:creator>renaud</dc:creator>
      <dc:date>2023-02-17T17:24:27Z</dc:date>
    </item>
    <item>
      <title>Re: ls1021a IRQ connection</title>
      <link>https://community.nxp.com/t5/Layerscape/ls1021a-IRQ-connection/m-p/1601270#M11876</link>
      <description>&lt;P&gt;The IRQ number is as expected as seen by gic_set_type:&lt;/P&gt;&lt;P&gt;gic_set_type: gicirq = 197.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 17 Feb 2023 17:40:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/ls1021a-IRQ-connection/m-p/1601270#M11876</guid>
      <dc:creator>renaud</dc:creator>
      <dc:date>2023-02-17T17:40:27Z</dc:date>
    </item>
    <item>
      <title>Re: ls1021a IRQ connection</title>
      <link>https://community.nxp.com/t5/Layerscape/ls1021a-IRQ-connection/m-p/1601290#M11877</link>
      <description>&lt;P&gt;Is the solution to change the IRQ polarity?&lt;/P&gt;</description>
      <pubDate>Fri, 17 Feb 2023 19:10:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/ls1021a-IRQ-connection/m-p/1601290#M11877</guid>
      <dc:creator>renaud</dc:creator>
      <dc:date>2023-02-17T19:10:38Z</dc:date>
    </item>
    <item>
      <title>Re: ls1021a IRQ connection</title>
      <link>https://community.nxp.com/t5/Layerscape/ls1021a-IRQ-connection/m-p/1604331#M11907</link>
      <description>&lt;P&gt;&lt;SPAN&gt;SPIs interrupt only support low-to-high rising edge triggered and active high triggered.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;You can check this in "linux/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml"&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt; bits[3:0] trigger type and level flags.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; 1 = low-to-high edge triggered&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; 2 = high-to-low edge triggered (invalid for SPIs)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; 4 = active high level-sensitive&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; 8 = active low level-sensitive (invalid for SPIs).&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;You can also find some description about it in ARM GIC document:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;"SPIs...., You can configure whether each SPI is triggered on a rising edge or is active-HIGH level-sensitive."&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;For customers who design their boards only support active-low interrupt, they can configure the interrupt PIN to GPIO mode and active low is supported by GPIO interrupt. &lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 23 Feb 2023 06:37:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/ls1021a-IRQ-connection/m-p/1604331#M11907</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2023-02-23T06:37:56Z</dc:date>
    </item>
    <item>
      <title>Re: ls1021a IRQ connection</title>
      <link>https://community.nxp.com/t5/Layerscape/ls1021a-IRQ-connection/m-p/1604599#M11913</link>
      <description>&lt;P&gt;Looking at the symbol for the LS1021A, IRQ2 pin can only be an IRQ. While IRQ3 can be GPIO1_23.&lt;/P&gt;&lt;P&gt;That may mean I cannot go in GPIO mode for this pin. This is confirmed by RCW setting that only applies to IRQ3:5&lt;/P&gt;</description>
      <pubDate>Thu, 23 Feb 2023 12:58:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/ls1021a-IRQ-connection/m-p/1604599#M11913</guid>
      <dc:creator>renaud</dc:creator>
      <dc:date>2023-02-23T12:58:18Z</dc:date>
    </item>
    <item>
      <title>Re: ls1021a IRQ connection</title>
      <link>https://community.nxp.com/t5/Layerscape/ls1021a-IRQ-connection/m-p/1608455#M11968</link>
      <description>&lt;P&gt;Is the gpio interrupt number the same?&lt;/P&gt;&lt;P&gt;Is it connected the same way in the device tree?&lt;/P&gt;</description>
      <pubDate>Thu, 02 Mar 2023 14:59:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/ls1021a-IRQ-connection/m-p/1608455#M11968</guid>
      <dc:creator>renaud</dc:creator>
      <dc:date>2023-03-02T14:59:15Z</dc:date>
    </item>
    <item>
      <title>Re: ls1021a IRQ connection</title>
      <link>https://community.nxp.com/t5/Layerscape/ls1021a-IRQ-connection/m-p/1609045#M11977</link>
      <description>&lt;P&gt;&lt;SPAN&gt;Is the gpio interrupt number the same?&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;// As LS0121A RM description, the internal interrupt number is 197.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Is it connected the same way in the device tree?&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;// Yes, in the dts, the number should be 197-32=165.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Fri, 03 Mar 2023 08:13:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/ls1021a-IRQ-connection/m-p/1609045#M11977</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2023-03-03T08:13:24Z</dc:date>
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