<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>LayerscapeのトピックFUID</title>
    <link>https://community.nxp.com/t5/Layerscape/FUID/m-p/1594113#M11802</link>
    <description>&lt;P&gt;On the ls1012a "There are two memory-mapped FUIDR registers whose values comprise FUID, the registers are 32-bit RO at addresses 1E8_021C and 1E8_0220. More information on these registers can be found in Trust Architecture Manual." Where are these addresses for the LS1028A?&lt;/P&gt;</description>
    <pubDate>Mon, 06 Feb 2023 17:13:01 GMT</pubDate>
    <dc:creator>CGW</dc:creator>
    <dc:date>2023-02-06T17:13:01Z</dc:date>
    <item>
      <title>FUID</title>
      <link>https://community.nxp.com/t5/Layerscape/FUID/m-p/1594113#M11802</link>
      <description>&lt;P&gt;On the ls1012a "There are two memory-mapped FUIDR registers whose values comprise FUID, the registers are 32-bit RO at addresses 1E8_021C and 1E8_0220. More information on these registers can be found in Trust Architecture Manual." Where are these addresses for the LS1028A?&lt;/P&gt;</description>
      <pubDate>Mon, 06 Feb 2023 17:13:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/FUID/m-p/1594113#M11802</guid>
      <dc:creator>CGW</dc:creator>
      <dc:date>2023-02-06T17:13:01Z</dc:date>
    </item>
    <item>
      <title>Re: FUID</title>
      <link>https://community.nxp.com/t5/Layerscape/FUID/m-p/1595675#M11823</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;The FUIDR is a 64-bit value set (and write protected) with a software readable value. You can use images that&lt;BR /&gt;can only pass secure boot on a specific chip.&lt;/P&gt;
&lt;P&gt;This FUIDR value is replaced with a process in the LS1028A, such thing does not occur in almost all LayerScape processors.&lt;/P&gt;
&lt;P&gt;The reason that the register is replaced with the process is to ensure the protection intended even in the documentation itself.&lt;/P&gt;
&lt;P&gt;Thank you for your patience, regards&lt;/P&gt;</description>
      <pubDate>Thu, 16 Feb 2023 16:59:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/FUID/m-p/1595675#M11823</guid>
      <dc:creator>JosephAtNXP</dc:creator>
      <dc:date>2023-02-16T16:59:17Z</dc:date>
    </item>
    <item>
      <title>Re: FUID</title>
      <link>https://community.nxp.com/t5/Layerscape/FUID/m-p/1605422#M11929</link>
      <description>&lt;P&gt;Any chance you code provide some code to get access to the&amp;nbsp;FUIDR?&lt;/P&gt;</description>
      <pubDate>Fri, 24 Feb 2023 17:34:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/FUID/m-p/1605422#M11929</guid>
      <dc:creator>CGW</dc:creator>
      <dc:date>2023-02-24T17:34:28Z</dc:date>
    </item>
  </channel>
</rss>

