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    <title>LayerscapeのトピックForce PCIe errors</title>
    <link>https://community.nxp.com/t5/Layerscape/Force-PCIe-errors/m-p/1586358#M11740</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;With LS1043A, I am using PEX3 controller to make a PCIe link to an endpoint device. In firmware, I am periodically reading&amp;nbsp;PCIe error status registers to count correctable, non-fatal uncorrectable&amp;nbsp;and fatal uncorrectable&amp;nbsp;errors. The PCIe link is good and well configured, so I do not get any errors. I am looking for a way to force atleast one of each error type. Is there a way through firmware (eg- register settings)&amp;nbsp;or by injecting a hardware fault on PCIe link (eg- grounding a PCIe interface line) to force any of these errors? &lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Correctable errors- Advisory Non-Fatal Error , Replay timer timeout, REPLAY_NUM Rollover, Bad DLLP, Bad TLP, Receiver error.&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Non-fatal uncorrectable errors- Unsupported request error status, ECRC error status, Unexpected completion status, Completer abort status, Completion timeout status, Poisoned TLP status.&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Fatal uncorrectable errors- Malformed TLP, Receiver overflow, Flow control protocol error, Data link protocol error.&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Thank you&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Sat, 21 Jan 2023 23:51:07 GMT</pubDate>
    <dc:creator>kunal_b</dc:creator>
    <dc:date>2023-01-21T23:51:07Z</dc:date>
    <item>
      <title>Force PCIe errors</title>
      <link>https://community.nxp.com/t5/Layerscape/Force-PCIe-errors/m-p/1586358#M11740</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;With LS1043A, I am using PEX3 controller to make a PCIe link to an endpoint device. In firmware, I am periodically reading&amp;nbsp;PCIe error status registers to count correctable, non-fatal uncorrectable&amp;nbsp;and fatal uncorrectable&amp;nbsp;errors. The PCIe link is good and well configured, so I do not get any errors. I am looking for a way to force atleast one of each error type. Is there a way through firmware (eg- register settings)&amp;nbsp;or by injecting a hardware fault on PCIe link (eg- grounding a PCIe interface line) to force any of these errors? &lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Correctable errors- Advisory Non-Fatal Error , Replay timer timeout, REPLAY_NUM Rollover, Bad DLLP, Bad TLP, Receiver error.&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Non-fatal uncorrectable errors- Unsupported request error status, ECRC error status, Unexpected completion status, Completer abort status, Completion timeout status, Poisoned TLP status.&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Fatal uncorrectable errors- Malformed TLP, Receiver overflow, Flow control protocol error, Data link protocol error.&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Thank you&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Sat, 21 Jan 2023 23:51:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/Force-PCIe-errors/m-p/1586358#M11740</guid>
      <dc:creator>kunal_b</dc:creator>
      <dc:date>2023-01-21T23:51:07Z</dc:date>
    </item>
    <item>
      <title>Re: Force PCIe errors</title>
      <link>https://community.nxp.com/t5/Layerscape/Force-PCIe-errors/m-p/1586683#M11741</link>
      <description>&lt;P&gt;HI &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/211490"&gt;@kunal_b&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Please refer &lt;A href="https://www.google.com/url?sa=t&amp;amp;rct=j&amp;amp;q=&amp;amp;esrc=s&amp;amp;source=web&amp;amp;cd=&amp;amp;cad=rja&amp;amp;uact=8&amp;amp;ved=2ahUKEwjgzLPY_d38AhXoxjgGHdsAC40QFnoECBMQAQ&amp;amp;url=https%3A%2F%2Fwww.nxp.com%2Fdocs%2Fen%2Fuser-guide%2FLSDKUG_Rev21.08.pdf&amp;amp;usg=AOvVaw3ERK3k1ND0LA381PrbxFak" target="_self"&gt;LSDK 21.08 User Guide&lt;/A&gt; section 7.2.8.2 PCIe Advanced Error Reporting User Manual to fake various kinds of PCIe errors.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Thanks&lt;/P&gt;
&lt;P&gt;Khushbu&lt;/P&gt;</description>
      <pubDate>Mon, 23 Jan 2023 15:20:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/Force-PCIe-errors/m-p/1586683#M11741</guid>
      <dc:creator>khushbur</dc:creator>
      <dc:date>2023-01-23T15:20:01Z</dc:date>
    </item>
    <item>
      <title>Re: Force PCIe errors</title>
      <link>https://community.nxp.com/t5/Layerscape/Force-PCIe-errors/m-p/1586809#M11745</link>
      <description>&lt;P&gt;Hi Khushbu,&lt;/P&gt;&lt;P&gt;I am not using LSDK or Linux with LS1043A. I am using bare-metal programming. I saw that the LSDK user guide&amp;nbsp;&lt;SPAN&gt;section 7.2.8.2 uses a software tool to inject PCIe error. Can you let me know what the tool does? Is it an intrusive error injection technique which injects error in PCIe controller's dataflow or some simple PCIe register settings? I am trying to understand if I can replicate the tool's behavior in bare-metal programming.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Thank you&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;-Kunal&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 23 Jan 2023 20:32:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/Force-PCIe-errors/m-p/1586809#M11745</guid>
      <dc:creator>kunal_b</dc:creator>
      <dc:date>2023-01-23T20:32:12Z</dc:date>
    </item>
    <item>
      <title>Re: Force PCIe errors</title>
      <link>https://community.nxp.com/t5/Layerscape/Force-PCIe-errors/m-p/1592270#M11787</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/211490"&gt;@kunal_b&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Please refer below link for more information about&amp;nbsp;aer-inject test utility&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.kernel.org/doc/Documentation/PCI/pcieaer-howto.txt" target="_self"&gt;https://www.kernel.org/doc/Documentation/PCI/pcieaer-howto.txt&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;Khushbu&lt;/P&gt;</description>
      <pubDate>Thu, 02 Feb 2023 11:04:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/Force-PCIe-errors/m-p/1592270#M11787</guid>
      <dc:creator>khushbur</dc:creator>
      <dc:date>2023-02-02T11:04:35Z</dc:date>
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