<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>LayerscapeのトピックLS1046A - IFC GPCM Support for CSOR[ADM_SHFT_MODE] =1</title>
    <link>https://community.nxp.com/t5/Layerscape/LS1046A-IFC-GPCM-Support-for-CSOR-ADM-SHFT-MODE-1/m-p/1502060#M10990</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;Our design is to support 20-bit addressing of IFC in GPCM mode. GPCM Mode of IFC will it support both&amp;nbsp;CSOR[ADM_SHFT_MODE] 0 &amp;amp; 1 ?&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Ganesh&lt;/P&gt;</description>
    <pubDate>Sat, 06 Aug 2022 10:51:53 GMT</pubDate>
    <dc:creator>CGganesh</dc:creator>
    <dc:date>2022-08-06T10:51:53Z</dc:date>
    <item>
      <title>LS1046A - IFC GPCM Support for CSOR[ADM_SHFT_MODE] =1</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1046A-IFC-GPCM-Support-for-CSOR-ADM-SHFT-MODE-1/m-p/1502060#M10990</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;Our design is to support 20-bit addressing of IFC in GPCM mode. GPCM Mode of IFC will it support both&amp;nbsp;CSOR[ADM_SHFT_MODE] 0 &amp;amp; 1 ?&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Ganesh&lt;/P&gt;</description>
      <pubDate>Sat, 06 Aug 2022 10:51:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1046A-IFC-GPCM-Support-for-CSOR-ADM-SHFT-MODE-1/m-p/1502060#M10990</guid>
      <dc:creator>CGganesh</dc:creator>
      <dc:date>2022-08-06T10:51:53Z</dc:date>
    </item>
    <item>
      <title>Re: LS1046A - IFC GPCM Support for CSOR[ADM_SHFT_MODE] =1</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1046A-IFC-GPCM-Support-for-CSOR-ADM-SHFT-MODE-1/m-p/1507578#M11046</link>
      <description>&lt;P&gt;Hello, Thank you for contacting the Technical Support Team,&lt;/P&gt;
&lt;P&gt;&lt;BR /&gt;Yes, it is possible if you write on the register ADM_SHFT “10100” you will have IFC with 20 bit Address,&lt;BR /&gt;On the other hand writing on the register ADM_SHFT_ MODE “0” or “1”you will be able to you can switch to less significant and more significant directions.&lt;/P&gt;
&lt;P&gt;&lt;BR /&gt;I attach some referenced images obtained from the reference manual.&lt;/P&gt;
&lt;P&gt;Best Regards, &lt;/P&gt;
&lt;P&gt;Hector Villarruel S&lt;/P&gt;</description>
      <pubDate>Wed, 17 Aug 2022 15:40:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1046A-IFC-GPCM-Support-for-CSOR-ADM-SHFT-MODE-1/m-p/1507578#M11046</guid>
      <dc:creator>Hector_Villarruel</dc:creator>
      <dc:date>2022-08-17T15:40:49Z</dc:date>
    </item>
  </channel>
</rss>

