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LS1020A RTC questions

enriqueencarnac — Wed, 23 Dec 2015 18:59:43 GMT

Just finding my way around the documentation for the LS1020A but cannot seem to find anything about the RTC (real-time clock) capability (or lack of it). Is there an RTC on chip that just requires an external battery, or what is the device type I need to connect to pin TA_BB_RTC?

1) On what pin should I provide my 32768Hz clock for the LS1020A, is it TA_BB_RTC?

2) At what voltage levels?

3) Which pin is the battery voltage supplied on, is it TA_BB_VDD?

4) What is the current draw from the battery pin.

I am not using the trust/SecMon feature if that question comes up.

Re: LS1020A RTC questions

Pavel — Thu, 24 Dec 2015 05:10:08 GMT

1) The TA_BB_RTC or RTC pins can be used as clock source for the LS1021A RTC. See the Figure 4-8 of the LS1021A Reference Manual:

https://www.nxp.com/webapp/Download?colCode=LS1021ARM&location=null&fpsp=1&WT_TYPE=Reference%20Manuals&WT_VENDOR=FREESCALE&WT_FILE_FORMAT=pdf&WT_ASSET=Documentation&fileExt=.pdf&Parent_nodeId=1378142598972722203474&Parent_pageType=product.

2) Recommended value is 1.8V. See the Table 3 of the LS1021A Datasheet:

https://www.nxp.com/webapp/Download?colCode=LS1021A&location=null&fpsp=1&WT_TYPE=Data%20Sheets&WT_VENDOR=FREESCALE&WT_FILE_FORMAT=pdf&WT_ASSET=Documentation&fileExt=.pdf&Parent_nodeId=1378142598972722203474&Parent_pageType=product

3) Yes, the TA_BB_VDD pins is power supply pin for the TA_BB_RTC pin. See the Table 1 of the LS1021 Datasheet. Find the TA_BB_RTC pin and power supply for this pin.

The OVDD is power supply for the RTC/GPIO1_14 pin.

4) See the Table 6 of the LS1021A Datasheet.

Have a great day,
Pavel

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Re: LS1020A RTC questions

enriqueencarnac — Tue, 19 Jan 2016 18:11:27 GMT

Hi Pavel,

I have the following follow up questions. Please help answer these. In advance, thank you.

1) App note AN5097 states:

• Bit-swap is only allowed within a nibble.
• Bit-swap across two nibbles is not allowed.

Does this note refer to just x4 memory configurations (where there is one DQS pair per 4-bits)? Or does it also refer to x8 configurations (where there is one DQS pair per 8-bits)?

2) In app note AN5097 it states "17 For QorIQ products with DDR3L and DDR4 memory options, there is an external VREF pin available for DDR3L mode. When DDR4 mode is used the external VREF pin needs to be grounded."

To which pin is it referring as I don't see an equivalent comment in the reference manual?

3) In an earlier email it was suggested that the TA_BB_RTC be driven from a 1.8V device. However, I am using TA_BB_RTC as my clock input which is powered from TA_BB_VDD (which is a 1V supply), surely the I/O voltage to that pin should be a maximum of 1V? Or is the pin tolerant to a higher voltage? Where in the datasheet does it show the recommended maximum voltage driving pin R6?

4) It looks to me like there is an inconsistency in the datasheet.

Page 20 says MDC/MDIO are related to L1VDD.

Page 61 says that Ethernet Management Interface is powered by LVDD.

Page 92 says that the MDC/MDIO pins are available on LVDD and L1VDD.

Could you clarify which comment is correct, and perhaps get the datasheet corrected.

5) It looks to me like there is another inconsistency in the datasheet.

Page 51 says DVDD is 1.8 V ± 90 mV

The schematics for LS1021A-IOT and TWR-LS1021A-PB both have DVDD connected to 3.3V I/O.

Pin J2 is a good example.

Could you tell me the real voltage range for DVDD.

6) Could you please confirm that the power draw highlighted in yellow in the attached is the total power drawn by both the AVDD_SD1_PLL1/2 pins, and not per PLL pin.

Re: LS1020A RTC questions

Pavel — Wed, 20 Jan 2016 06:10:59 GMT

1. It is information from the JEDEC Standard No. 21C:

https://www.google.ru/url?sa=t&rct=j&q=&esrc=s&source=web&cd=2&cad=rja&uact=8&ved=0ahUKEwi86ruJzbfKAhXDox4KHfl4AJwQFggiMAE&url=http%3A%2F%2Fwww.jedec.org%2Fsites%2Fdefault%2Ffiles%2Fdocs%2F4_20_26R24.pdf&usg=AFQjCNE91eZMe4JUIrXkyRv0pT1AKGFhIQ&bvm=bv.112064104,d.dmo

2. In DDR4, VREF is only used for address/command bus of DDR4 DRAM. Memory controller VREF is generated internally. When DDR4 mode is used the external VREF pin needs to be grounded. It is D1_MVREF pin of the LS1021A.

3. The TA_BB_RTC pin recommended voltage level is 1V see the Table 3 of the LS1021A Datasheet.

4. See Note 7 for the Table 3 of the LS1021A Datasheet:

LVDD and L1VDD must always be the same voltage.

5. Find the DVDD_VSEL (435-436 bits) of the LS1021A RCW. See the Table 4-14 of the LS1021A Reference Manual. These bits determinates internal switch for using external DVDD voltage. If DVDD_VSEL is set to 0b10, external DVDD powers supply can be 3.3V.

If DVDD_VSEL is set to 0b00, external DVDD powers supply should be 1.8V. Do not use 3.3V DVDD if DVDD_VSEL is set to 0b00. The LS1021a can be damaged.

6. It is power consumption of PLL. It is not current from PLL pins.

Have a great day,
Pavel