https://community.nxp.com/t5/Layerscape/PROGRAMMING-OF-CLOCK-GENERATOR-SI5332/m-p/1477833#M10732 <P>I am designing a hardware using LS1046 and I am using Si5332 clock generator as in FRWY reference design. In the reference design, SCL and SDA of Si 5332 is pulled up and not connected to processor. Please find the attachment. Now,</P><P>1) I am just wondering How can I configure Si 5332, that is different output frequencies at different logic levels, if I2C is not connected to CPU?</P><P>2) Is there any other method to configure Si 5332?</P><P>Thanks in advance</P> Wed, 22 Jun 2022 04:07:35 GMT Ellu24 2022-06-22T04:07:35Z https://community.nxp.com/t5/Layerscape/PROGRAMMING-OF-CLOCK-GENERATOR-SI5332/m-p/1477833#M10732 <P>I am designing a hardware using LS1046 and I am using Si5332 clock generator as in FRWY reference design. In the reference design, SCL and SDA of Si 5332 is pulled up and not connected to processor. Please find the attachment. Now,</P><P>1) I am just wondering How can I configure Si 5332, that is different output frequencies at different logic levels, if I2C is not connected to CPU?</P><P>2) Is there any other method to configure Si 5332?</P><P>Thanks in advance</P> Wed, 22 Jun 2022 04:07:35 GMT https://community.nxp.com/t5/Layerscape/PROGRAMMING-OF-CLOCK-GENERATOR-SI5332/m-p/1477833#M10732 Ellu24 2022-06-22T04:07:35Z