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    <title>topic Re: LS1043A SPI and eSDHC Chip Select Conflict in Layerscape</title>
    <link>https://community.nxp.com/t5/Layerscape/LS1043A-SPI-and-eSDHC-Chip-Select-Conflict/m-p/1474089#M10689</link>
    <description>&lt;P&gt;&lt;SPAN&gt;Customer can use 4-bit mode of eSDHC interface if they are using SPI and eSDHC simultaneously.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Each of the muxed pins cannot be independently configured therefore we cannot assign an unused GPIO pin for SPI Chip Selects&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Wed, 15 Jun 2022 05:16:32 GMT</pubDate>
    <dc:creator>yipingwang</dc:creator>
    <dc:date>2022-06-15T05:16:32Z</dc:date>
    <item>
      <title>LS1043A SPI and eSDHC Chip Select Conflict</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1043A-SPI-and-eSDHC-Chip-Select-Conflict/m-p/1472283#M10666</link>
      <description>&lt;P&gt;It seems that the designated chip select pins for the SPI interface are muxed with the DATA[4:7] pins for the eSDHC interface, which means I can't use the eSDHC interface in 8-bit mode to connect to an eMMC if I also want SPI device(s)...?&lt;/P&gt;&lt;P&gt;Do I really have to sacrifice ~50% of my eMMC throughput to use an SPI device, or is there some way of assigning an unused GPIO pin for use as SPI Chip Selects?&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Ian&lt;/P&gt;</description>
      <pubDate>Fri, 10 Jun 2022 13:51:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1043A-SPI-and-eSDHC-Chip-Select-Conflict/m-p/1472283#M10666</guid>
      <dc:creator>ian_m</dc:creator>
      <dc:date>2022-06-10T13:51:59Z</dc:date>
    </item>
    <item>
      <title>Re: LS1043A SPI and eSDHC Chip Select Conflict</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1043A-SPI-and-eSDHC-Chip-Select-Conflict/m-p/1474089#M10689</link>
      <description>&lt;P&gt;&lt;SPAN&gt;Customer can use 4-bit mode of eSDHC interface if they are using SPI and eSDHC simultaneously.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Each of the muxed pins cannot be independently configured therefore we cannot assign an unused GPIO pin for SPI Chip Selects&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 15 Jun 2022 05:16:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1043A-SPI-and-eSDHC-Chip-Select-Conflict/m-p/1474089#M10689</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2022-06-15T05:16:32Z</dc:date>
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