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    <title>topic ls1046a uboot  nand  flash fail ..? in Layerscape</title>
    <link>https://community.nxp.com/t5/Layerscape/ls1046a-uboot-nand-flash-fail/m-p/1443987#M10386</link>
    <description>&lt;P&gt;&lt;SPAN&gt;Use flexbuild_lsdk2108&amp;nbsp;development environment&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;nand&amp;nbsp; flash&amp;nbsp; hardware : &lt;/SPAN&gt;&amp;nbsp;S34MS08G200BH_BGA63P&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;uboot test nand write command failed&amp;nbsp; &amp;nbsp; ..?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;log :&lt;/P&gt;&lt;P&gt;=&amp;gt; nand write 0xa0000000 0 100&lt;/P&gt;&lt;P&gt;NAND write: device 0 offset 0x0, size 0x100&lt;BR /&gt;fsl-ifc: NAND Flash ECC Uncorrectable Error&lt;BR /&gt;NAND write to offset 0 failed -5&lt;BR /&gt;0 bytes written: ERROR&lt;BR /&gt;=&amp;gt; nand erase 0 100&lt;/P&gt;&lt;P&gt;NAND erase: device 0 offset 0x0, size 0x100&lt;BR /&gt;Erasing at 0x0 -- 100% complete.&lt;BR /&gt;OK&lt;BR /&gt;=&amp;gt; nand write 0xa0000000 0 10&lt;/P&gt;&lt;P&gt;NAND write: device 0 offset 0x0, size 0x10&lt;BR /&gt;fsl-ifc: NAND Flash ECC Uncorrectable Error&lt;BR /&gt;NAND write to offset 0 failed -5&lt;BR /&gt;0 bytes written: ERROR&lt;BR /&gt;=&amp;gt;&lt;/P&gt;</description>
    <pubDate>Thu, 14 Apr 2022 08:46:07 GMT</pubDate>
    <dc:creator>hongyuanz</dc:creator>
    <dc:date>2022-04-14T08:46:07Z</dc:date>
    <item>
      <title>ls1046a uboot  nand  flash fail ..?</title>
      <link>https://community.nxp.com/t5/Layerscape/ls1046a-uboot-nand-flash-fail/m-p/1443987#M10386</link>
      <description>&lt;P&gt;&lt;SPAN&gt;Use flexbuild_lsdk2108&amp;nbsp;development environment&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;nand&amp;nbsp; flash&amp;nbsp; hardware : &lt;/SPAN&gt;&amp;nbsp;S34MS08G200BH_BGA63P&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;uboot test nand write command failed&amp;nbsp; &amp;nbsp; ..?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;log :&lt;/P&gt;&lt;P&gt;=&amp;gt; nand write 0xa0000000 0 100&lt;/P&gt;&lt;P&gt;NAND write: device 0 offset 0x0, size 0x100&lt;BR /&gt;fsl-ifc: NAND Flash ECC Uncorrectable Error&lt;BR /&gt;NAND write to offset 0 failed -5&lt;BR /&gt;0 bytes written: ERROR&lt;BR /&gt;=&amp;gt; nand erase 0 100&lt;/P&gt;&lt;P&gt;NAND erase: device 0 offset 0x0, size 0x100&lt;BR /&gt;Erasing at 0x0 -- 100% complete.&lt;BR /&gt;OK&lt;BR /&gt;=&amp;gt; nand write 0xa0000000 0 10&lt;/P&gt;&lt;P&gt;NAND write: device 0 offset 0x0, size 0x10&lt;BR /&gt;fsl-ifc: NAND Flash ECC Uncorrectable Error&lt;BR /&gt;NAND write to offset 0 failed -5&lt;BR /&gt;0 bytes written: ERROR&lt;BR /&gt;=&amp;gt;&lt;/P&gt;</description>
      <pubDate>Thu, 14 Apr 2022 08:46:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/ls1046a-uboot-nand-flash-fail/m-p/1443987#M10386</guid>
      <dc:creator>hongyuanz</dc:creator>
      <dc:date>2022-04-14T08:46:07Z</dc:date>
    </item>
    <item>
      <title>Re: ls1046a uboot  nand  flash fail ..?</title>
      <link>https://community.nxp.com/t5/Layerscape/ls1046a-uboot-nand-flash-fail/m-p/1444407#M10393</link>
      <description>&lt;P&gt;Please modify IFC NAND timing configuration in&amp;nbsp;components/firmware/uboot/include/configs/ls1046ardb.h according to your target board.&lt;/P&gt;
&lt;P&gt;#define CONFIG_SYS_NAND_CSPR_EXT (0x0)&lt;BR /&gt;#define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \&lt;BR /&gt;| CSPR_PORT_SIZE_8 \&lt;BR /&gt;| CSPR_MSEL_NAND \&lt;BR /&gt;| CSPR_V)&lt;BR /&gt;#define CONFIG_SYS_NAND_AMASK IFC_AMASK(64 * 1024)&lt;BR /&gt;#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \&lt;BR /&gt;| CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \&lt;BR /&gt;| CSOR_NAND_ECC_MODE_8 /* 8-bit ECC */ \&lt;BR /&gt;| CSOR_NAND_RAL_3 /* RAL = 3 Bytes */ \&lt;BR /&gt;| CSOR_NAND_PGS_4K /* Page Size = 4K */ \&lt;BR /&gt;| CSOR_NAND_SPRZ_224 /* Spare size = 224 */ \&lt;BR /&gt;| CSOR_NAND_PB(64)) /* 64 Pages Per Block */&lt;/P&gt;
&lt;P&gt;#define CONFIG_SYS_NAND_ONFI_DETECTION&lt;/P&gt;
&lt;P&gt;#define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x7) | \&lt;BR /&gt;FTIM0_NAND_TWP(0x18) | \&lt;BR /&gt;FTIM0_NAND_TWCHT(0x7) | \&lt;BR /&gt;FTIM0_NAND_TWH(0xa))&lt;BR /&gt;#define CONFIG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x32) | \&lt;BR /&gt;FTIM1_NAND_TWBE(0x39) | \&lt;BR /&gt;FTIM1_NAND_TRR(0xe) | \&lt;BR /&gt;FTIM1_NAND_TRP(0x18))&lt;BR /&gt;#define CONFIG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0xf) | \&lt;BR /&gt;FTIM2_NAND_TREH(0xa) | \&lt;BR /&gt;FTIM2_NAND_TWHRE(0x1e))&lt;BR /&gt;#define CONFIG_SYS_NAND_FTIM3 0x0&lt;/P&gt;
&lt;P&gt;Please refer to&amp;nbsp;&lt;A href="https://community.nxp.com/t5/Layerscape-Knowledge-Base/IFC-Controller-Configuration-on-QorIQ-Custom-Boards/ta-p/1109156" target="_blank"&gt;https://community.nxp.com/t5/Layerscape-Knowledge-Base/IFC-Controller-Configuration-on-QorIQ-Custom-Boards/ta-p/1109156&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Then remove folder build/firmware/u-boot/, rebuild atf image.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 15 Apr 2022 05:32:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/ls1046a-uboot-nand-flash-fail/m-p/1444407#M10393</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2022-04-15T05:32:32Z</dc:date>
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