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    <title>topic LS1023 Setting for Qspi and IFC Bus in Layerscape</title>
    <link>https://community.nxp.com/t5/Layerscape/LS1023-Setting-for-Qspi-and-IFC-Bus/m-p/1440918#M10352</link>
    <description>&lt;P&gt;&lt;SPAN&gt;First, I set the BOOT setting of RCW to Quad SPI(QSPI_A). &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;After CPU boots, I'd like to use IFC Bus. But the following pins of CPU are multiplexed: 　QSPI_A_CS0/IFC_A16 　 &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; QSPI_A_CS1/IFC_A17 &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;If this goes on, I can't use IFC_A16,A17. To enable IFC_A16,A17,how should I do?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;(I think there are some internal registers for mode setting, but I couldn't find them.)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Thank you.&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Fri, 08 Apr 2022 01:55:30 GMT</pubDate>
    <dc:creator>kk_1123</dc:creator>
    <dc:date>2022-04-08T01:55:30Z</dc:date>
    <item>
      <title>LS1023 Setting for Qspi and IFC Bus</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1023-Setting-for-Qspi-and-IFC-Bus/m-p/1440918#M10352</link>
      <description>&lt;P&gt;&lt;SPAN&gt;First, I set the BOOT setting of RCW to Quad SPI(QSPI_A). &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;After CPU boots, I'd like to use IFC Bus. But the following pins of CPU are multiplexed: 　QSPI_A_CS0/IFC_A16 　 &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; QSPI_A_CS1/IFC_A17 &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;If this goes on, I can't use IFC_A16,A17. To enable IFC_A16,A17,how should I do?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;(I think there are some internal registers for mode setting, but I couldn't find them.)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Thank you.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Fri, 08 Apr 2022 01:55:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1023-Setting-for-Qspi-and-IFC-Bus/m-p/1440918#M10352</guid>
      <dc:creator>kk_1123</dc:creator>
      <dc:date>2022-04-08T01:55:30Z</dc:date>
    </item>
    <item>
      <title>Re: LS1023 Setting for Qspi and IFC Bus</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1023-Setting-for-Qspi-and-IFC-Bus/m-p/1531677#M11234</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/195006"&gt;@kk_1123&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;If QuadSPI is selected for cfg_rcw_src then the&amp;nbsp;&lt;SPAN class=""&gt;&lt;SPAN class="highlight appended"&gt;IFC_GRP&lt;/SPAN&gt;_F_EXT&lt;/SPAN&gt; field must be set to 001 which means IFC signals signal can't be configured.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards&lt;/P&gt;
&lt;P&gt;Mrudang Shelat&lt;/P&gt;</description>
      <pubDate>Mon, 03 Oct 2022 14:22:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1023-Setting-for-Qspi-and-IFC-Bus/m-p/1531677#M11234</guid>
      <dc:creator>mrudangshelat-13</dc:creator>
      <dc:date>2022-10-03T14:22:50Z</dc:date>
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