<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic [LS1046A] Can't access PCI Express configuration area. in Layerscape</title>
    <link>https://community.nxp.com/t5/Layerscape/LS1046A-Can-t-access-PCI-Express-configuration-area/m-p/1433498#M10284</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I just making my first steps in bare metal coding for the LS1046A SoC.&lt;/P&gt;&lt;P&gt;I have a working setup with the Freeway Board and CodeWarrior + Probe and I am able to debug C code.&lt;/P&gt;&lt;P&gt;The problems have started when I tried to initialize the PCIe.&lt;/P&gt;&lt;P&gt;As one of the first steps I wanted to access the PEX1 register on address 0x340_0000.&lt;/P&gt;&lt;P&gt;First I failed to access this address and the debugger seems to disconnect by stepping into this instruction by deref a pointer with 0x340_0000.&lt;/P&gt;&lt;P&gt;Then I kind of figured out that by setting the CSU_CSL registers to zero the debug session seems to be able to step over the instruction.&lt;/P&gt;&lt;P&gt;I set the following registers to zero:&lt;/P&gt;&lt;P&gt;CSL0, CSL3, CSL4, CSL8&lt;/P&gt;&lt;P&gt;Now I concentrated back on the PEX1 register and I was able read out a value. It was just 0x0000_0000 which was unexpected since in my opinion it should contain the Venor ID and Device ID with the reset value 0x81C0_1957 (QorIQ LS1046A Reference Manual Chapter 25.4.2.1). But it is still empty.&lt;/P&gt;&lt;P&gt;Now I am a little bit lost and I hope someone can help here.&lt;/P&gt;&lt;P&gt;Let me know if I shall provide additional information.&lt;/P&gt;&lt;P&gt;Thanks.&lt;/P&gt;</description>
    <pubDate>Thu, 24 Mar 2022 14:15:08 GMT</pubDate>
    <dc:creator>rfxiGEMmonot4r</dc:creator>
    <dc:date>2022-03-24T14:15:08Z</dc:date>
    <item>
      <title>[LS1046A] Can't access PCI Express configuration area.</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1046A-Can-t-access-PCI-Express-configuration-area/m-p/1433498#M10284</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I just making my first steps in bare metal coding for the LS1046A SoC.&lt;/P&gt;&lt;P&gt;I have a working setup with the Freeway Board and CodeWarrior + Probe and I am able to debug C code.&lt;/P&gt;&lt;P&gt;The problems have started when I tried to initialize the PCIe.&lt;/P&gt;&lt;P&gt;As one of the first steps I wanted to access the PEX1 register on address 0x340_0000.&lt;/P&gt;&lt;P&gt;First I failed to access this address and the debugger seems to disconnect by stepping into this instruction by deref a pointer with 0x340_0000.&lt;/P&gt;&lt;P&gt;Then I kind of figured out that by setting the CSU_CSL registers to zero the debug session seems to be able to step over the instruction.&lt;/P&gt;&lt;P&gt;I set the following registers to zero:&lt;/P&gt;&lt;P&gt;CSL0, CSL3, CSL4, CSL8&lt;/P&gt;&lt;P&gt;Now I concentrated back on the PEX1 register and I was able read out a value. It was just 0x0000_0000 which was unexpected since in my opinion it should contain the Venor ID and Device ID with the reset value 0x81C0_1957 (QorIQ LS1046A Reference Manual Chapter 25.4.2.1). But it is still empty.&lt;/P&gt;&lt;P&gt;Now I am a little bit lost and I hope someone can help here.&lt;/P&gt;&lt;P&gt;Let me know if I shall provide additional information.&lt;/P&gt;&lt;P&gt;Thanks.&lt;/P&gt;</description>
      <pubDate>Thu, 24 Mar 2022 14:15:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1046A-Can-t-access-PCI-Express-configuration-area/m-p/1433498#M10284</guid>
      <dc:creator>rfxiGEMmonot4r</dc:creator>
      <dc:date>2022-03-24T14:15:08Z</dc:date>
    </item>
  </channel>
</rss>

