topic Re: Spi with DMA in Layerscape https://community.nxp.com/t5/Layerscape/Spi-with-DMA/m-p/498940#M1023 <HTML><HEAD></HEAD><BODY><P><SPAN lang="EN-US" style="font-size: 10.0pt; color: black;">It is strange that </SPAN><SPAN lang="EN-US" style="font-size: 10.0pt;">TXCTR and TXNXTPTR field of the </SPAN><SPAN lang="EN-US" style="font-size: 10.0pt;">SPI_SR register are</SPAN><SPAN lang="EN-US" style="font-size: 10.0pt;"> cleared in your register dump.</SPAN></P><P><SPAN lang="EN-US" style="font-size: 10.0pt;">What is value of the </SPAN><SPAN lang="EN-US" style="font-size: 10.0pt;">SPI_PUSHR register?</SPAN></P><P></P><P><BR />Have a great day,<BR />Pavel Chubakov</P><P></P><P>-----------------------------------------------------------------------------------------------------------------------<BR />Note: If this post answers your question, please click the Correct Answer button. Thank you!<BR />-----------------------------------------------------------------------------------------------------------------------</P></BODY></HTML> Fri, 27 May 2016 11:43:31 GMT Pavel 2016-05-27T11:43:31Z Spi with DMA https://community.nxp.com/t5/Layerscape/Spi-with-DMA/m-p/498939#M1022 <HTML><HEAD></HEAD><BODY><P>I am currently integrating eDMA with the SPI driver on the LS1021A. Everything starts as expected but then stops without reason after only 2 or 3 frame transfers (8 or 16 bit frames). It appears that the TFFF flag gets reset and does not recover. The FIFO should not be full and a quick register dump confirms this. There are no other eDMA channels active, just this one. Has anyone else seen this behavior or might know why a DMA would just stop??</P><P>Thank You</P><P></P><P>Greg</P><P></P><P>Attached is a scope trace and below is a register dump from after the DMA stopped. The transfer should have been 16 8-bit frames.</P><P></P><P>[67163.983905] fsl-dspi 2100000.dspi: <BR />[67163.987382] fsl-dspi 2100000.dspi:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; SPI_MCR = 0x803f0000<BR />[67163.993305] fsl-dspi 2100000.dspi:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; SPI_TCR = 0x00030000<BR />[67163.999223] fsl-dspi 2100000.dspi:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; SPI_CTAR0 = 0x38001103<BR />[67164.005117] fsl-dspi 2100000.dspi:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; SPI_CTAR1 = 0x78000000<BR />[67164.011083] fsl-dspi 2100000.dspi:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; SPI_CTAR2 = 0x78000000<BR />[67164.016979] fsl-dspi 2100000.dspi:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; SPI_CTAR3 = 0x78000000<BR />[67164.022909] fsl-dspi 2100000.dspi:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; SPI_SR = 0xc0830030<BR />[67164.028822] fsl-dspi 2100000.dspi:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; SPI_RSER = 0x03030000<BR />[67164.034717] fsl-dspi 2100000.dspi:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; SPI_TXFR0 = 0x80010033<BR />[67164.040638] fsl-dspi 2100000.dspi:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; SPI_TXFR1 = 0x00000000<BR />[67164.046535] fsl-dspi 2100000.dspi:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; SPI_TXFR2 = 0x00000000<BR /> [67164.046535] fsl-dspi 2100000.dspi:&nbsp;&nbsp;&nbsp;&nbsp; SPI_TXFR3 = 0x00000000<BR />[67164.058372] fsl-dspi 2100000.dspi:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; SPI_RXFR0 = 0x000000ff<BR />[67164.064266] fsl-dspi 2100000.dspi:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; SPI_RXFR1 = 0x000000ff<BR />[67164.070187] fsl-dspi 2100000.dspi:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; SPI_RXFR2 = 0x000000ff<BR />[67164.076088] fsl-dspi 2100000.dspi:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; SPI_RXFR3 = 0x00000000<BR />[67164.082008] fsl-dspi 2100000.dspi:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; SPI_CTARE0 = 0x00000000<BR />[67164.087906] fsl-dspi 2100000.dspi:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; SPI_CTARE1 = 0x00000000<BR />[67164.093820] fsl-dspi 2100000.dspi:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; SPI_CTARE2 = 0x00000000<BR />[67164.099737] fsl-dspi 2100000.dspi:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; SPI_CTARE3 = 0x00000000<BR />[67164.105630] fsl-dspi 2100000.dspi:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; SPI_SREX = 0x00000000</P><P>[67164.243449] fsl-edma 2c00000.edma:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; DMA_CR&nbsp;&nbsp;&nbsp; = 0x0000000c<BR />[67164.249370] fsl-edma 2c00000.edma:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; DMA_ES&nbsp;&nbsp;&nbsp; = 0x00000000<BR />[67164.255266] fsl-edma 2c00000.edma:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; DMA_ERQ&nbsp;&nbsp;&nbsp; = 0x00000002<BR />[67164.261180] fsl-edma 2c00000.edma:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; DMA_EEI&nbsp;&nbsp;&nbsp; = 0x00000002<BR />[67164.267107] fsl-edma 2c00000.edma:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; DMA_INT&nbsp;&nbsp;&nbsp; = 0x00000000<BR />[67164.273029] fsl-edma 2c00000.edma:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; DMA_ERR&nbsp;&nbsp;&nbsp; = 0x00000000<BR />[67164.278943] fsl-edma 2c00000.edma:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; DMA_HRS&nbsp;&nbsp;&nbsp; = 0x00000000<BR />[67164.284862] fsl-edma 2c00000.edma:&nbsp;&nbsp;&nbsp;&nbsp; DMA_EARS&nbsp;&nbsp;&nbsp; = 0x1bf50000<BR />[67164.290786] fsl-edma 2c00000.edma:&nbsp;&nbsp;&nbsp;&nbsp; TCD_BASE[1] = 0xc08a1020<BR />[67164.296687] fsl-edma 2c00000.edma:&nbsp;&nbsp;&nbsp; TCD_SADDR[1] = 0xbe3e001c<BR />[67164.302613] fsl-edma 2c00000.edma:&nbsp;&nbsp;&nbsp;&nbsp; TCD_ATTR[1] = 0x0202<BR />[67164.308179] fsl-edma 2c00000.edma:&nbsp;&nbsp;&nbsp;&nbsp; TCD_SOFF[1] = 0x0004<BR />[67164.313726] fsl-edma 2c00000.edma:&nbsp;&nbsp; TCD_NBYTES[1] = 0x00000004<BR />[67164.319645] fsl-edma 2c00000.edma:&nbsp;&nbsp;&nbsp; TCD_SLAST[1] = 0x00000000<BR />[67164.325546] fsl-edma 2c00000.edma:&nbsp;&nbsp;&nbsp; TCD_DADDR[1] = 0x02100034<BR />[67164.331459] fsl-edma 2c00000.edma:&nbsp;&nbsp;&nbsp; TCD_CITER[1] = 0x000d<BR />[67164.337016] fsl-edma 2c00000.edma:&nbsp;&nbsp;&nbsp;&nbsp; TCD_DOFF[1] = 0x0000<BR />[67164.342591] fsl-edma 2c00000.edma: TCD_DLASTSGA[1] = 0x00000000<BR />[67164.348505] fsl-edma 2c00000.edma:&nbsp;&nbsp;&nbsp; TCD_BITER[1] = 0x0010<BR />[67164.354052] fsl-edma 2c00000.edma:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; TCD_CSR[1] = 0x000a<BR />[67164.359619] fsl-edma 2c00000.edma: <BR />[67164.363102] fsl-edma 2c00000.edma:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; DMAMUX[1] = +62</P></BODY></HTML> Tue, 24 May 2016 17:42:45 GMT https://community.nxp.com/t5/Layerscape/Spi-with-DMA/m-p/498939#M1022 greghuber 2016-05-24T17:42:45Z Re: Spi with DMA https://community.nxp.com/t5/Layerscape/Spi-with-DMA/m-p/498940#M1023 <HTML><HEAD></HEAD><BODY><P><SPAN lang="EN-US" style="font-size: 10.0pt; color: black;">It is strange that </SPAN><SPAN lang="EN-US" style="font-size: 10.0pt;">TXCTR and TXNXTPTR field of the </SPAN><SPAN lang="EN-US" style="font-size: 10.0pt;">SPI_SR register are</SPAN><SPAN lang="EN-US" style="font-size: 10.0pt;"> cleared in your register dump.</SPAN></P><P><SPAN lang="EN-US" style="font-size: 10.0pt;">What is value of the </SPAN><SPAN lang="EN-US" style="font-size: 10.0pt;">SPI_PUSHR register?</SPAN></P><P></P><P><BR />Have a great day,<BR />Pavel Chubakov</P><P></P><P>-----------------------------------------------------------------------------------------------------------------------<BR />Note: If this post answers your question, please click the Correct Answer button. Thank you!<BR />-----------------------------------------------------------------------------------------------------------------------</P></BODY></HTML> Fri, 27 May 2016 11:43:31 GMT https://community.nxp.com/t5/Layerscape/Spi-with-DMA/m-p/498940#M1023 Pavel 2016-05-27T11:43:31Z