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    <title>LayerscapeのトピックRe: LS1043A Secure Boot from QSPI</title>
    <link>https://community.nxp.com/t5/Layerscape/LS1043A-Secure-Boot-from-QSPI/m-p/1428380#M10221</link>
    <description>&lt;P&gt;Would you please describe in details how you generated QSPI secure boot image?&lt;/P&gt;
&lt;P&gt;Do you use CodeWarrior CCS to connect to your target board to input&amp;nbsp;SRKH key? Have you programmed OPTMK on the target board?&lt;/P&gt;</description>
    <pubDate>Tue, 15 Mar 2022 09:37:16 GMT</pubDate>
    <dc:creator>yipingwang</dc:creator>
    <dc:date>2022-03-15T09:37:16Z</dc:date>
    <item>
      <title>LS1043A Secure Boot from QSPI</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1043A-Secure-Boot-from-QSPI/m-p/1427013#M10213</link>
      <description>&lt;P&gt;I am trying to implement Secure Boot on a custom board with a LS1043A and QSPI NOR Flash and I can't manage to have any output in Secure Mode ( SB_EN=1 + BOOT_HOLD=1) with this in RCW set to 0 my board boot.&lt;/P&gt;&lt;P&gt;In document "QorIQ Trust Architecture 2.1 User Guide" chapter 6.1.1 it show a table where Soc LS1043A with RCW in QSPI is in "N/A"&lt;/P&gt;&lt;P&gt;Does this confirm that it is impossible to do some Secure boot in this case ?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 11 Mar 2022 16:53:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1043A-Secure-Boot-from-QSPI/m-p/1427013#M10213</guid>
      <dc:creator>Teddy1</dc:creator>
      <dc:date>2022-03-11T16:53:17Z</dc:date>
    </item>
    <item>
      <title>Re: LS1043A Secure Boot from QSPI</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1043A-Secure-Boot-from-QSPI/m-p/1428380#M10221</link>
      <description>&lt;P&gt;Would you please describe in details how you generated QSPI secure boot image?&lt;/P&gt;
&lt;P&gt;Do you use CodeWarrior CCS to connect to your target board to input&amp;nbsp;SRKH key? Have you programmed OPTMK on the target board?&lt;/P&gt;</description>
      <pubDate>Tue, 15 Mar 2022 09:37:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1043A-Secure-Boot-from-QSPI/m-p/1428380#M10221</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2022-03-15T09:37:16Z</dc:date>
    </item>
    <item>
      <title>Re: LS1043A Secure Boot from QSPI</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1043A-Secure-Boot-from-QSPI/m-p/1428390#M10222</link>
      <description>&lt;P&gt;I am&amp;nbsp; building from scratch with LSDK-20.12 packages : rcw, atf, u-boot and cst from codeaurora repository at tag LSDK-20.12.&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;RCW is simply build with "make" on my custom target with SB_EN=1 and BOOT_HO=1 (inspired from ls1043aqds)&lt;/LI&gt;&lt;LI&gt;U-Boot is build with&lt;/LI&gt;&lt;/UL&gt;&lt;LI-CODE lang="python"&gt;make ARCH=arm CROSS_COMPILE=aarch64-zds-linux-gnueabi- -C /home/teddy/tmp/git/u-boot-bare-lsdk2012 -j 4 KBUILD_OUTPUT=/home/teddy/tmp/git/u-boot-bare-lsdk2012_build mrproper ls1043a_ps4c_tfa_defconfig all&lt;/LI-CODE&gt;&lt;UL&gt;&lt;LI&gt;cst has simply been build with make, a srk.pri/srk.pub key paire generated&lt;/LI&gt;&lt;LI&gt;ATF is build with:&lt;/LI&gt;&lt;/UL&gt;&lt;LI-CODE lang="python"&gt;CROSS_COMPILE=aarch64-zds-linux-gnueabi- ARCH=aarch64 make PLAT=ls1043aps4c CSF_HEADER_PREPENDED=1 TRUSTED_BOARD_BOOT=1 CST_DIR=/home/teddy/tmp/git/cst-head_dev all fip pbl RCW=rcw_1200_qspiboot_atf_sb.bin LOG_LEVEL=40 BL33=u-boot.bin&lt;/LI-CODE&gt;&lt;P&gt;Then I have bl2_qspi_sec.pbl flashed at addresse 0x00 of QSPI and fip.bin&amp;nbsp; to offset 0x100000 in QSPI.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I am working in developpement, so for now not writing all the OTP things, so I use the CCS JTAG probe and do script to set all the SRKH mirror registers and release boot hold.&lt;/P&gt;&lt;P&gt;After boot hold release, there is no message on UART debug console and registers don't show me obvious error of configuration&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Same process without Secure Boot configured in RCW and ATF build without "CSF_HEADER_PREPENDED=1 TRUSTED_BOARD_BOOT=1" and U-boot build without "CONFIG_NXP_ESBC" lead to a correct non-secure boot.&lt;/P&gt;</description>
      <pubDate>Tue, 15 Mar 2022 09:52:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1043A-Secure-Boot-from-QSPI/m-p/1428390#M10222</guid>
      <dc:creator>Teddy1</dc:creator>
      <dc:date>2022-03-15T09:52:44Z</dc:date>
    </item>
    <item>
      <title>Re: LS1043A Secure Boot from QSPI</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1043A-Secure-Boot-from-QSPI/m-p/1429050#M10228</link>
      <description>&lt;P&gt;Blowing of OTPMK is essential to run secure boot for both Production and Development phases.&lt;/P&gt;
&lt;P&gt;Please refer to the attached document for&amp;nbsp;Blowing OTPMK.&lt;/P&gt;</description>
      <pubDate>Wed, 16 Mar 2022 07:23:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1043A-Secure-Boot-from-QSPI/m-p/1429050#M10228</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2022-03-16T07:23:44Z</dc:date>
    </item>
    <item>
      <title>Re: LS1043A Secure Boot from QSPI</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1043A-Secure-Boot-from-QSPI/m-p/1430742#M10239</link>
      <description>&lt;P&gt;Yes, even in development mode, when you don't want to blow OTP things, you SHALL blow OTPMK at least.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I just booted in trusted boot.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you for your support.&lt;/P&gt;</description>
      <pubDate>Fri, 18 Mar 2022 14:39:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1043A-Secure-Boot-from-QSPI/m-p/1430742#M10239</guid>
      <dc:creator>Teddy1</dc:creator>
      <dc:date>2022-03-18T14:39:25Z</dc:date>
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