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    <title>LayerscapeのトピックRe: Does LS1046A support DMA and Cache coherency?</title>
    <link>https://community.nxp.com/t5/Layerscape/Does-LS1046A-support-DMA-and-Cache-coherency/m-p/1416731#M10097</link>
    <description>&lt;P&gt;USB snooping is controlled by the SCFG_SNPCNFGC - refer to the LS1046A Reference Manual, 11.3.27 Snoop Configuration Register (SCFG_SNPCNFGCR).&lt;/P&gt;
&lt;P&gt;PCIe snooping is controlled by "No Snoop" TLP attribute.&lt;/P&gt;
&lt;P&gt;Frame Manager snooping is always enabled.&lt;/P&gt;</description>
    <pubDate>Mon, 21 Feb 2022 10:59:13 GMT</pubDate>
    <dc:creator>ufedor</dc:creator>
    <dc:date>2022-02-21T10:59:13Z</dc:date>
    <item>
      <title>Does LS1046A support DMA and Cache coherency?</title>
      <link>https://community.nxp.com/t5/Layerscape/Does-LS1046A-support-DMA-and-Cache-coherency/m-p/1416557#M10094</link>
      <description>&lt;P&gt;Does LS1046A support DMA(USB / PCIe / Networking Controller) and CPU Cache&amp;nbsp;coherency? Like description with below link:&lt;/P&gt;&lt;P&gt;&lt;A href="https://abcamus.github.io/2017/06/26/ARM-CCI/" target="_blank" rel="noopener nofollow noreferrer"&gt;https://abcamus.github.io/2017/06/26/ARM-CCI/&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.arm.com/cn/b/blog/posts/--1--" target="_blank"&gt;https://community.arm.com/cn/b/blog/posts/--1--&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.arm.com/cn/b/blog/posts/--3---corelink-cci-500" target="_blank"&gt;https://community.arm.com/cn/b/blog/posts/--3---corelink-cci-500&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I see the LS1046A Processors Block Diagram contained CCI400&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/layerscape-processors/layerscape-1046a-and-1026a-processors:LS1046A" target="_blank"&gt;https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/layerscape-processors/layerscape-1046a-and-1026a-processors:LS1046A&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 21 Feb 2022 07:50:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/Does-LS1046A-support-DMA-and-Cache-coherency/m-p/1416557#M10094</guid>
      <dc:creator>win847</dc:creator>
      <dc:date>2022-02-21T07:50:28Z</dc:date>
    </item>
    <item>
      <title>Re: Does LS1046A support DMA and Cache coherency?</title>
      <link>https://community.nxp.com/t5/Layerscape/Does-LS1046A-support-DMA-and-Cache-coherency/m-p/1416731#M10097</link>
      <description>&lt;P&gt;USB snooping is controlled by the SCFG_SNPCNFGC - refer to the LS1046A Reference Manual, 11.3.27 Snoop Configuration Register (SCFG_SNPCNFGCR).&lt;/P&gt;
&lt;P&gt;PCIe snooping is controlled by "No Snoop" TLP attribute.&lt;/P&gt;
&lt;P&gt;Frame Manager snooping is always enabled.&lt;/P&gt;</description>
      <pubDate>Mon, 21 Feb 2022 10:59:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/Does-LS1046A-support-DMA-and-Cache-coherency/m-p/1416731#M10097</guid>
      <dc:creator>ufedor</dc:creator>
      <dc:date>2022-02-21T10:59:13Z</dc:date>
    </item>
    <item>
      <title>Re: Does LS1046A support DMA and Cache coherency?</title>
      <link>https://community.nxp.com/t5/Layerscape/Does-LS1046A-support-DMA-and-Cache-coherency/m-p/1417061#M10101</link>
      <description>&lt;P&gt;Thanks for your reply.&lt;/P&gt;</description>
      <pubDate>Tue, 22 Feb 2022 01:47:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/Does-LS1046A-support-DMA-and-Cache-coherency/m-p/1417061#M10101</guid>
      <dc:creator>win847</dc:creator>
      <dc:date>2022-02-22T01:47:22Z</dc:date>
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