https://community.nxp.com/t5/Layerscape/LA1028A-EEPROM-problem-consultation/m-p/1416300#M10088 <P>Please refer to the QorIQ LS1028A Reference Design Board Reference Manual, Table 15. I2C1 bus device map.</P> <P>&gt; <SPAN class="">In the design, can it be removed?</SPAN></P> <P>U47 can be removed if booting from I2C is not needed.</P> <P>U50 can be removed if hard-coded DDR controller settings are provided in the TF-A BL2.</P> Sun, 20 Feb 2022 06:12:01 GMT ufedor 2022-02-20T06:12:01Z https://community.nxp.com/t5/Layerscape/LA1028A-EEPROM-problem-consultation/m-p/1416295#M10087 <P><SPAN class="">In the LS1028A schematic, there are three different EEPROM devices, what are the functions respectively?</SPAN><SPAN class=""> Is there a detailed documentation?</SPAN><SPAN class=""> In the design, can it be removed?</SPAN><SPAN class=""> Thank you very much!</SPAN><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="微信图片_20220220122001.png" style="width: 872px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/171109i2615E6E3358628A5/image-size/large?v=v2&amp;px=999" role="button" title="微信图片_20220220122001.png" alt="微信图片_20220220122001.png" /></span></P> Sun, 20 Feb 2022 04:41:19 GMT https://community.nxp.com/t5/Layerscape/LA1028A-EEPROM-problem-consultation/m-p/1416295#M10087 jack_huang1 2022-02-20T04:41:19Z https://community.nxp.com/t5/Layerscape/LA1028A-EEPROM-problem-consultation/m-p/1416300#M10088 <P>Please refer to the QorIQ LS1028A Reference Design Board Reference Manual, Table 15. I2C1 bus device map.</P> <P>&gt; <SPAN class="">In the design, can it be removed?</SPAN></P> <P>U47 can be removed if booting from I2C is not needed.</P> <P>U50 can be removed if hard-coded DDR controller settings are provided in the TF-A BL2.</P> Sun, 20 Feb 2022 06:12:01 GMT https://community.nxp.com/t5/Layerscape/LA1028A-EEPROM-problem-consultation/m-p/1416300#M10088 ufedor 2022-02-20T06:12:01Z