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    <title>topic LX2160A-RDB-B DRAM Address in Layerscape</title>
    <link>https://community.nxp.com/t5/Layerscape/LX2160A-RDB-B-DRAM-Address/m-p/1411491#M10022</link>
    <description>&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;Please tell me about LX2160A-RDB-B.&lt;BR /&gt;The LX2160A-RDB-B has 32GByte of DRAM.&lt;BR /&gt;There are two 16GByte DIMMs on the board.&lt;BR /&gt;The memory map, on the other hand, looks like this.&lt;/P&gt;&lt;P&gt;GPP DRAM Region #1 0x0000_8000_0000-0x0000_FFFF_FFFF (2GB)&lt;BR /&gt;GPP DRAM Region #2 0x0020_8000_0000-0x003F_FFFF_FFFF (126GB)&lt;BR /&gt;GPP DRAM Region #3 0x0060_0000_0000-0x007F_FFFF_FFFF (128GB)&lt;/P&gt;&lt;P&gt;What will be the physical address of the memory space that can actually be used?&lt;BR /&gt;Will the addresses for the two DIMMs be assigned to Region #2?&lt;BR /&gt;Or will the two DIMMs be assigned to Region #2 and Region #3 respectively?&lt;/P&gt;&lt;P&gt;0x0000_8000_0000-0x0000_FFFF_FFFF(2GB) + 0x0020_8000_0000-0x0023_FFFF_FFFF(14GB) + 0x0060_0000_0000-0x0063_FFFF_FFFF(16GB)&lt;BR /&gt;or&lt;BR /&gt;0x0000_8000_0000-0x0000_FFFF_FFFF(2GB) + 0x0020_8000_0000-0x0027_FFFF_FFFF(30GB)&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;</description>
    <pubDate>Thu, 10 Feb 2022 03:12:30 GMT</pubDate>
    <dc:creator>kouno</dc:creator>
    <dc:date>2022-02-10T03:12:30Z</dc:date>
    <item>
      <title>LX2160A-RDB-B DRAM Address</title>
      <link>https://community.nxp.com/t5/Layerscape/LX2160A-RDB-B-DRAM-Address/m-p/1411491#M10022</link>
      <description>&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;Please tell me about LX2160A-RDB-B.&lt;BR /&gt;The LX2160A-RDB-B has 32GByte of DRAM.&lt;BR /&gt;There are two 16GByte DIMMs on the board.&lt;BR /&gt;The memory map, on the other hand, looks like this.&lt;/P&gt;&lt;P&gt;GPP DRAM Region #1 0x0000_8000_0000-0x0000_FFFF_FFFF (2GB)&lt;BR /&gt;GPP DRAM Region #2 0x0020_8000_0000-0x003F_FFFF_FFFF (126GB)&lt;BR /&gt;GPP DRAM Region #3 0x0060_0000_0000-0x007F_FFFF_FFFF (128GB)&lt;/P&gt;&lt;P&gt;What will be the physical address of the memory space that can actually be used?&lt;BR /&gt;Will the addresses for the two DIMMs be assigned to Region #2?&lt;BR /&gt;Or will the two DIMMs be assigned to Region #2 and Region #3 respectively?&lt;/P&gt;&lt;P&gt;0x0000_8000_0000-0x0000_FFFF_FFFF(2GB) + 0x0020_8000_0000-0x0023_FFFF_FFFF(14GB) + 0x0060_0000_0000-0x0063_FFFF_FFFF(16GB)&lt;BR /&gt;or&lt;BR /&gt;0x0000_8000_0000-0x0000_FFFF_FFFF(2GB) + 0x0020_8000_0000-0x0027_FFFF_FFFF(30GB)&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;</description>
      <pubDate>Thu, 10 Feb 2022 03:12:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LX2160A-RDB-B-DRAM-Address/m-p/1411491#M10022</guid>
      <dc:creator>kouno</dc:creator>
      <dc:date>2022-02-10T03:12:30Z</dc:date>
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    <item>
      <title>Re: LX2160A-RDB-B DRAM Address</title>
      <link>https://community.nxp.com/t5/Layerscape/LX2160A-RDB-B-DRAM-Address/m-p/1411560#M10023</link>
      <description>&lt;P&gt;The ARM memory map places DRAM regions such that there are upper DRAM regions for 40-bit physical address space.&lt;/P&gt;
&lt;P&gt;To achieve larger than 2 GB of DDR memory on a single chip select and to create a contiguous memory space to interleave DDR memory, a remapping logic is implemented. The remapping logic resides between the SoC space and DDR. The remapping logic, re-maps the SoC address to DDR physical address. The remapping logic is not visible or configurable by software.&lt;/P&gt;
&lt;P&gt;The LX2160A remapping is shown below:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Soc Memory Address Remapping.jpg" style="width: 681px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/170126i696AA52948389EDC/image-dimensions/681x599?v=v2" width="681" height="599" role="button" title="Soc Memory Address Remapping.jpg" alt="Soc Memory Address Remapping.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt; &lt;/P&gt;</description>
      <pubDate>Thu, 10 Feb 2022 06:29:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LX2160A-RDB-B-DRAM-Address/m-p/1411560#M10023</guid>
      <dc:creator>ufedor</dc:creator>
      <dc:date>2022-02-10T06:29:26Z</dc:date>
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