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    <title>topic Re: Help needed. About HCS08 interrupts in 8-bit Microcontrollers</title>
    <link>https://community.nxp.com/t5/8-bit-Microcontrollers/Help-needed-About-HCS08-interrupts/m-p/160782#M9712</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;thanks bigmac,&lt;/P&gt;&lt;P&gt;now, i understand the meaning of&amp;nbsp; nesting interupt,&amp;nbsp;which means that if a high interrutp occurs during progress of &amp;nbsp;the service of a low interrupt , the high interrupt can&amp;nbsp; take CPU&amp;nbsp;from&amp;nbsp;the low interrupt &amp;nbsp; immediately, no waiting.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;no interrupt should lost even if the CUP do not support the nesting interrupt scheduling(preemptive scheduling), it only delay the service time.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 09 Nov 2010 08:52:22 GMT</pubDate>
    <dc:creator>CASEYKEVIN</dc:creator>
    <dc:date>2010-11-09T08:52:22Z</dc:date>
    <item>
      <title>Help needed. About HCS08 interrupts</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/Help-needed-About-HCS08-interrupts/m-p/160780#M9710</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;there are 32 interrupts in HCS08 family, and HCS08 MCUs do not support nesting interrupts.&amp;nbsp;&amp;nbsp;Can I use more than 1 interrutps? in my application, 2 ISRs ared need as following&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;void interrupt 30 ACMP_ISR(void)&amp;nbsp; /* low priority */&lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;&amp;nbsp;/* code here */&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;void interrutp 25 RTC_ISR(void)&amp;nbsp; /* high priority */&lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; /* code here */&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;if RTC_ISR() is being executed, at the same time, &amp;nbsp;ACMP interrupt&amp;nbsp; is generated,&amp;nbsp; when program exits from RTC_ISR() , the ACMP_ISR()&amp;nbsp; is lost or not? since the priority of RTC interrupt is high than ACMP interrupt.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 05 Nov 2010 08:02:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/Help-needed-About-HCS08-interrupts/m-p/160780#M9710</guid>
      <dc:creator>CASEYKEVIN</dc:creator>
      <dc:date>2010-11-05T08:02:25Z</dc:date>
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    <item>
      <title>Re: Help needed. About HCS08 interrupts</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/Help-needed-About-HCS08-interrupts/m-p/160781#M9711</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;You may have as many different interrupts enabled as you require&amp;nbsp;for an application.&amp;nbsp; When an interrupt trigger occurs, a flag will be set to indicate an interrupt event.&amp;nbsp; If no other interrupt is currently being serviced, the ISR code for that interrupt will be immediately entered.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;However, if another interrupt is already being serviced, the servicing of the new interrupt will be delayed until the other ISR code exits.&amp;nbsp; If more than one other interrupt is queued, the order of servicing&amp;nbsp;the queued interrupts will take into account the interrupt priorities.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;No interrupt event will be lost since the interrupt flag will remain set until servicing takes place.&amp;nbsp; The sequential servicing of interrupts is the reason that ISR code should be as short as possible.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;For your application, you will need to evaluate whether the execution time of the ACMP ISR code represents an allowable maximum delay to the execution of the RTC ISR code.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Nested interrupts are possible, but should only be considered as a last resort, due to increased code overheads and stack requirements.&amp;nbsp; For your case, the ACMP ISR code would need disable further ACMP interrupts from occurring, prior to globally re-enabling interrupts.&amp;nbsp; Just prior to exiting the ACMP ISR, interrupts would need to be again&amp;nbsp;globally disabled, and the ACMP interrupt re-enabled.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;If you had more than one lower priority interrupt, all of these would need to be temporarily disabled, to allow&amp;nbsp;a single high priority interrupt only&amp;nbsp;to be nested.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Should your ACMP code be too lengthy, for whatever reason, and provided your RTC code is very&amp;nbsp;short, there might be&amp;nbsp; another approach.&amp;nbsp; This is to poll the RTC flag from within the ACMP ISR, and execute the RTC code from there.&amp;nbsp; This could be done at more than one place within the&amp;nbsp;code sequence.&amp;nbsp; Since the RTC flag would be cleared by the RTC code, the&amp;nbsp;RTC interrupt would not occur when the ACMP&amp;nbsp;ISR exited.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Mac&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 05 Nov 2010 10:47:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/Help-needed-About-HCS08-interrupts/m-p/160781#M9711</guid>
      <dc:creator>bigmac</dc:creator>
      <dc:date>2010-11-05T10:47:07Z</dc:date>
    </item>
    <item>
      <title>Re: Help needed. About HCS08 interrupts</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/Help-needed-About-HCS08-interrupts/m-p/160782#M9712</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;thanks bigmac,&lt;/P&gt;&lt;P&gt;now, i understand the meaning of&amp;nbsp; nesting interupt,&amp;nbsp;which means that if a high interrutp occurs during progress of &amp;nbsp;the service of a low interrupt , the high interrupt can&amp;nbsp; take CPU&amp;nbsp;from&amp;nbsp;the low interrupt &amp;nbsp; immediately, no waiting.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;no interrupt should lost even if the CUP do not support the nesting interrupt scheduling(preemptive scheduling), it only delay the service time.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 09 Nov 2010 08:52:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/Help-needed-About-HCS08-interrupts/m-p/160782#M9712</guid>
      <dc:creator>CASEYKEVIN</dc:creator>
      <dc:date>2010-11-09T08:52:22Z</dc:date>
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