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    <title>topic Re: MC68HC908GP32CP Changing output on TIM interrupt in 8-bit Microcontrollers</title>
    <link>https://community.nxp.com/t5/8-bit-Microcontrollers/MC68HC908GP32CP-Changing-output-on-TIM-interrupt/m-p/159421#M9483</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;Thank you all for your replies! I knew the interrupt has to be cleared somehow, but just don't know how. I have read some application notes and in their source code they never cleared the interrupt flag. Hence I assumed that it doesn't need to be done. I'll try the suggestion tomorrow.&lt;BR /&gt;&lt;BR /&gt;Regards,&lt;BR /&gt;&lt;BR /&gt;PQ&lt;BR /&gt;&lt;BR /&gt;Message Edited by pmouse on &lt;SPAN class="date_text"&gt;2007-10-30&lt;/SPAN&gt; &lt;SPAN class="time_text"&gt;09:57 PM&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 31 Oct 2007 04:57:26 GMT</pubDate>
    <dc:creator>pmouse</dc:creator>
    <dc:date>2007-10-31T04:57:26Z</dc:date>
    <item>
      <title>MC68HC908GP32CP Changing output on TIM interrupt</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/MC68HC908GP32CP-Changing-output-on-TIM-interrupt/m-p/159414#M9476</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;SPAN&gt;Hey all,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I have a HC908GP32 chip that I want to use to generate two PWM signal&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;to drive two motors, and also generate a pulse signal for a LED. The&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;two PWM signal can be generated by TIM output compare, but since there&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;is only 2 output pins for the TIM1 on the CP package, TIM2 cannot be&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;config directly to generate the pulse for LED.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Therefore I have config TIM2CH0 to "software compare", and in the&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;interrupt generated, I toggle a selected output pin (say PTA_PTA3) by&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;the code:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;PTA_PTA3 =~ PTA_PTA3;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;However, when I measure the output on PTA3, there is nothing.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;The chip is driven by an external 9.8304MHZ crystal. The PLL is disabled.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;So to test my concept is really working, I have enabled TIM1CH0 and TIM1CH1's channel interrupt, and in the ISR I have the same code as above on different pins, i.e.,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;PTE_PTE0 =~ PTE_PTE0;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I then go and measured the output. I have discovered that TIM1CH0's interrupt toggles PTE_PTE0 every 11.8us (but the channel overflow period is 1.3ms, channel compare is 50% of the channel mod). Further more, TIM1CH1's interrupt seems to be not working, there is nothing measured on PTE_PTE1, and nothing on PTA_PTA3 either.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;This leads me to believe the timer is acting funny, so I measured the actual channel output pin on PTD_PTD5/6, their period is 1.3ms exactly. So the timer is differently generating PWM signal fine, it's just that the interrupts are weird.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;So I'm really confused by the result. Can someone explain to me why this is happening. How the TIM module interrupt work, and what is the interrupt frequency? Can I generate 2 actively monitored PWM signals and one fixed frequency/duty cycle pulse signal on this particular MCU?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Regards,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;PQ&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 Oct 2007 06:18:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/MC68HC908GP32CP-Changing-output-on-TIM-interrupt/m-p/159414#M9476</guid>
      <dc:creator>pmouse</dc:creator>
      <dc:date>2007-10-30T06:18:50Z</dc:date>
    </item>
    <item>
      <title>Re: MC68HC908GP32CP Changing output on TIM interrupt</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/MC68HC908GP32CP-Changing-output-on-TIM-interrupt/m-p/159415#M9477</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="2"&gt;Hello PQ,&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="2"&gt;&lt;/FONT&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="2"&gt;Welcome to the forum.&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="2"&gt;It is difficult to visualize your problem without&amp;nbsp;seeing the code you are using.&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="2"&gt;&lt;/FONT&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="2"&gt;I assume you would&amp;nbsp;setup for&amp;nbsp;unbuffered PWM output from each of the&amp;nbsp;TIM1 channels, where the PWM frequency for both channels is determined by the TMOD register setting.&amp;nbsp; Whenever the pulse width setting is to be altered, this would need to be accomplished within the ISR for the associated channel (because of unbuffered PWM mode).&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="2"&gt;&lt;/FONT&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="2"&gt;Since it appears that your intended&amp;nbsp;timer overflow period is 1.3ms, I would assume that your LED flash rate would need to be a multiple of this period.&amp;nbsp; So you would need to count each timer overflow to determine when the LED state should be toggled.&amp;nbsp;&lt;/FONT&gt; &lt;FONT size="2"&gt;LED control could&amp;nbsp;be accomplished from either one of the channel ISRs,&amp;nbsp;but you also might handle separately within&amp;nbsp;the TIM1 overflow ISR - this would probably be my personal preference.&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="2"&gt;&lt;/FONT&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="2"&gt;The ISR, whichever one you are using,&amp;nbsp;might contain the following LED control code:&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="2"&gt;&lt;/FONT&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT face="Courier New" size="2"&gt;tcount--;&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT face="Courier New" size="2"&gt;if (tcount == 0) {&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT face="Courier New" size="2"&gt;&amp;nbsp;&amp;nbsp; tcount = 154;&amp;nbsp; /*&amp;nbsp;200ms LED flash period */&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT face="Courier New" size="2"&gt;&amp;nbsp;&amp;nbsp; PTA ^= 0x08;&amp;nbsp;&amp;nbsp; /* Toggle PTA3 output */&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT face="Courier New" size="2"&gt;}&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="2"&gt;&lt;/FONT&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="2"&gt;where &lt;FONT face="Courier New"&gt;tcount&lt;/FONT&gt; is defined as a global value, 8 or 16&amp;nbsp;bits depending on the LED flash period that you require..&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="2"&gt;&lt;/FONT&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="2"&gt;Of course, PTA3 pin would&amp;nbsp;need to be initialised as an output.&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="2"&gt;&lt;/FONT&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="2"&gt;Regards,&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="2"&gt;Mac&lt;/FONT&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;BR /&gt;Message Edited by bigmac on &lt;SPAN class="date_text"&gt;2007-10-30&lt;/SPAN&gt; &lt;SPAN class="time_text"&gt;04:03 PM&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 Oct 2007 12:59:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/MC68HC908GP32CP-Changing-output-on-TIM-interrupt/m-p/159415#M9477</guid>
      <dc:creator>bigmac</dc:creator>
      <dc:date>2007-10-30T12:59:01Z</dc:date>
    </item>
    <item>
      <title>Re: MC68HC908GP32CP Changing output on TIM interrupt</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/MC68HC908GP32CP-Changing-output-on-TIM-interrupt/m-p/159416#M9478</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Hi,&lt;/DIV&gt;&lt;DIV&gt;I have not studied your messag closely but I would try to use the PWM mode instead of the Output Compare, that is I would use the T1MOD register to set the pulse width, instead of calculating where the next interrupt should be.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;If you just wanted to flash a LED, wouldn't the TBM work fine instead?&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Regards,&lt;/DIV&gt;&lt;DIV&gt;Ake&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 Oct 2007 20:14:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/MC68HC908GP32CP-Changing-output-on-TIM-interrupt/m-p/159416#M9478</guid>
      <dc:creator>Ake</dc:creator>
      <dc:date>2007-10-30T20:14:48Z</dc:date>
    </item>
    <item>
      <title>Re: MC68HC908GP32CP Changing output on TIM interrupt</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/MC68HC908GP32CP-Changing-output-on-TIM-interrupt/m-p/159417#M9479</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;A simple method I have used in the past is to use code in the output compare interrupt to turn the LED on and code in the Timer Overflow Interrupt to turn it off.&amp;nbsp; Your main code will then only need to set the Output compare register to adjust the duty factor.&amp;nbsp;&lt;BR /&gt;&lt;BR /&gt;If you set the Timer Modulus to a binary factor of 256, you can use a value of 0-255 to control the PWM and merely shift it left to calculate the Output Compare register value.&amp;nbsp; Choose your dividers for the slowest count where the LED does not flicker to minimize EMI.&lt;BR /&gt;&lt;BR /&gt;Good Luck,&lt;BR /&gt;&lt;BR /&gt;Peter House&lt;BR /&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 Oct 2007 22:00:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/MC68HC908GP32CP-Changing-output-on-TIM-interrupt/m-p/159417#M9479</guid>
      <dc:creator>PeterHouse</dc:creator>
      <dc:date>2007-10-30T22:00:41Z</dc:date>
    </item>
    <item>
      <title>Re: MC68HC908GP32CP Changing output on TIM interrupt</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/MC68HC908GP32CP-Changing-output-on-TIM-interrupt/m-p/159418#M9480</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;Hey all,&lt;BR /&gt;Thanks for the replies. I have tried all the above methods before, but none really worked. The main concern of me right now is that either the timer interrupt don't fire, or it fires too fast. I've configuated TIM1 to have a overflow period of 1.3ms, but the overflow interrupt never occurs, and the TIM1CH0 interrupt happens every 11 microseconds. Despite this the channel output on PTD_PTD5 has a period of exactly 1.3ms, so the timer is definitely working.&lt;BR /&gt;I'll post the mcu_config and the ISR code here later.&lt;BR /&gt;I'm also wondering, to toggle a pin, is there any harm to do:&lt;BR /&gt;PTA_PTA0＝～PTA_PTA0&lt;BR /&gt;versus&lt;BR /&gt;PTA ^= 0x1&lt;BR /&gt;&lt;BR /&gt;Regards&lt;BR /&gt;&lt;BR /&gt;PQ&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 Oct 2007 22:08:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/MC68HC908GP32CP-Changing-output-on-TIM-interrupt/m-p/159418#M9480</guid>
      <dc:creator>pmouse</dc:creator>
      <dc:date>2007-10-30T22:08:01Z</dc:date>
    </item>
    <item>
      <title>Re: MC68HC908GP32CP Changing output on TIM interrupt</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/MC68HC908GP32CP-Changing-output-on-TIM-interrupt/m-p/159419#M9481</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;P&gt;&lt;FONT face="Courier New"&gt;Hello All,&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="Courier New"&gt;&amp;nbsp; Here's the code that generates the pulse on PTE, the output measured on PTE_PTE0 is a square wave with a period of 11us, and the output measured on PTE_PTE1 is 0 at all time.&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="Courier New"&gt;Regards,&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="Courier New"&gt;PQ&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="Courier New"&gt;&lt;/FONT&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;FONT face="Courier New"&gt;/*&lt;BR /&gt;** ###################################################################&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; This code is generated by the Device Initialization Tool.&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; It is overwritten during code generation.&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; USER MODIFICATION ARE PRESERVED ONLY INSIDE INTERRUPT SERVICE ROUTINES&lt;BR /&gt;**&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Project&amp;nbsp;&amp;nbsp; : PeterQian&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Processor : MC68HC908GP32CP&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Version&amp;nbsp;&amp;nbsp; : Bean 01.110, Driver 01.00, CPU db: 2.89.061&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Datasheet : MC68HC908GP32 Rev. 7 03/2006&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Date/Time : 29/10/2007, 11:30 AM&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Abstract&amp;nbsp; :&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; This bean "MC68HC908GP32_40" provides initialization of the&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; CPU core and shared peripherals.&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Settings&amp;nbsp; :&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Clock setting&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; External clock&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : 9.8304 MHz&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; CPU mode selection&amp;nbsp; : 1&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Initialization interrupt priority : 1&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Stop instruction enabled : no&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; LVI module&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : yes&lt;BR /&gt;**&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Source clock&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : Main clock frequency / 1&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Internal bus clock&amp;nbsp; : 2.4576 MHz&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Contents&amp;nbsp; :&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Function "MCU_init" initializes selected peripherals&lt;BR /&gt;**&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (c) Copyright UNIS, spol. s r.o. 1997-2006&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; UNIS, spol s r.o.&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Jundrovska 33&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 624 00 Brno&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Czech Republic&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; http&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; :&lt;/FONT&gt; &lt;A href="http://www.processorexpert.com/" rel="nofollow" target="_blank"&gt;&lt;FONT face="Courier New"&gt;&lt;/FONT&gt;&lt;/A&gt;&lt;A href="https://community.nxp.com/www.processorexpert.com" target="test_blank"&gt;www.processorexpert.com&lt;/A&gt;&lt;BR /&gt;&lt;FONT face="Courier New"&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; mail&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; :&lt;/FONT&gt; &lt;A href="mailto:info@processorexpert.com" rel="nofollow" target="_blank"&gt;&lt;FONT face="Courier New"&gt;info@processorexpert.com&lt;/FONT&gt;&lt;/A&gt;&lt;BR /&gt;&lt;FONT face="Courier New"&gt;** ###################################################################&lt;BR /&gt;*/&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="Courier New"&gt;#include &amp;lt;MC68HC908GP32.h&amp;gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* I/O map for MC68HC908GP32CP */&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;FONT face="Courier New"&gt;#define CGM_DELAY&amp;nbsp; 0x27FFUL&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="Courier New"&gt;/*&lt;BR /&gt;** ===================================================================&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Method&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; :&amp;nbsp; MCU_init (bean MC68HC908GP32_40)&lt;BR /&gt;**&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Description :&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Device initialization code for selected peripherals.&lt;BR /&gt;** ===================================================================&lt;BR /&gt;*/&lt;BR /&gt;void MCU_init(void)&lt;BR /&gt;{&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="Courier New"&gt;/*** ### MC68HC908GP32_40 "Cpu" init code ... ***/&lt;BR /&gt;/*** PE initialization code after reset ***/&lt;BR /&gt;/* System clock initialization */&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="Courier New"&gt;&amp;nbsp; /* Common initialization of the write once registers */&lt;BR /&gt;&amp;nbsp; /* CONFIG1: COPRS=0,LVISTOP=0,LVIRSTD=0,LVIPWRD=0,LVI5OR3=0,SSREC=0,STOP=0,COPD=1 */&lt;BR /&gt;&amp;nbsp; CONFIG1 = 0x01;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;BR /&gt;&amp;nbsp; /* CONFIG2: OSCSTOPENB=0,SCIBDsrc=0 */&lt;BR /&gt;&amp;nbsp; CONFIG2 = 0x00;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;BR /&gt;&amp;nbsp; /* Common initialization of the CPU registers */&lt;BR /&gt;&amp;nbsp; /* PTDPUE: PTDPUE5=0,PTDPUE4=0 */&lt;BR /&gt;&amp;nbsp; PTDPUE &amp;amp;= (unsigned char)~0x30;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;BR /&gt;&amp;nbsp; /* ### Init_GPIO init code */&lt;BR /&gt;&amp;nbsp; /* PTE: PTE1=0,PTE0=0 */&lt;BR /&gt;&amp;nbsp; PTE &amp;amp;= (unsigned char)~0x03;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;BR /&gt;&amp;nbsp; /* DDRE: DDRE1=1,DDRE0=1 */&lt;BR /&gt;&amp;nbsp; DDRE |= (unsigned char)0x03;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;BR /&gt;&amp;nbsp; /* ### Init_TIM init code */&lt;BR /&gt;&amp;nbsp; /* T1SC: TOF=0,TOIE=0,TSTOP=1,TRST=1,PS2=0,PS1=0,PS0=0 */&lt;BR /&gt;&amp;nbsp; T1SC = 0x30;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Stop and reset counter */&lt;BR /&gt;&amp;nbsp; T1CH0 = 0x0190;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Compare 0 value setting */&lt;BR /&gt;&amp;nbsp; (void)(T1SC0 == 0);&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Channel 0 int. flag clearing (First part) */&lt;BR /&gt;&amp;nbsp; /* T1SC0: CH0F=0,CH0IE=1,MS0B=0,MS0A=1,ELS0B=1,ELS0A=1,TOV0=1,CH0MAX=0 */&lt;BR /&gt;&amp;nbsp; T1SC0 = 0x5E;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Int. flag clearing (2nd part) and&amp;nbsp; channel contr. register setting */&lt;BR /&gt;&amp;nbsp; T1CH1 = 0xFA;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Compare 1 value setting */&lt;BR /&gt;&amp;nbsp; (void)(T1SC1 == 0);&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Channel 1 int. flag clearing (First part) */&lt;BR /&gt;&amp;nbsp; /* T1SC1: CH1F=0,CH1IE=1,MS1A=1,ELS1B=0,ELS1A=1,TOV1=1,CH1MAX=0 */&lt;BR /&gt;&amp;nbsp; T1SC1 = 0x56;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Int. flag clearing (2nd part) and&amp;nbsp; channel contr. register setting */&lt;BR /&gt;&amp;nbsp; T1MOD = 0x0320;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Period value setting */&lt;BR /&gt;&amp;nbsp; (void)(T1SC == 0);&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Overflow int. flag clearing (first part) */&lt;BR /&gt;&amp;nbsp; /* T1SC: TOF=0,TOIE=1,TSTOP=0,TRST=0,PS2=0,PS1=1,PS0=0 */&lt;BR /&gt;&amp;nbsp; T1SC = 0x42;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Int. flag clearing (2nd part) and timer contr. register setting */&lt;BR /&gt;&amp;nbsp; /* ### */&lt;BR /&gt;&amp;nbsp; asm CLI;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Enable interrupts */&lt;BR /&gt;} /*MCU_init*/&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;FONT face="Courier New"&gt;/*&lt;BR /&gt;** ===================================================================&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Interrupt handler : isrINT_TIM1Ovr&lt;BR /&gt;**&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Description :&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; User interrupt service routine.&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Parameters&amp;nbsp; : None&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Returns&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : Nothing&lt;BR /&gt;** ===================================================================&lt;BR /&gt;*/&lt;BR /&gt;__interrupt void isrINT_TIM1Ovr(void)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp; /* Write your interrupt code here ... */&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;&amp;nbsp; // PTA_PTA3 = ~PTA_PTA3&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="Courier New"&gt;}&lt;BR /&gt;/* end of isrINT_TIM1Ovr */&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;FONT face="Courier New"&gt;/*&lt;BR /&gt;** ===================================================================&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Interrupt handler : isrINT_TIM1CH1&lt;BR /&gt;**&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Description :&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; User interrupt service routine.&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Parameters&amp;nbsp; : None&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Returns&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : Nothing&lt;BR /&gt;** ===================================================================&lt;BR /&gt;*/&lt;BR /&gt;__interrupt void isrINT_TIM1CH1(void)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp; /* Write your interrupt code here ... */&lt;BR /&gt;&amp;nbsp; PTE_PTE1 =~PTE_PTE1;&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="Courier New"&gt;}&lt;BR /&gt;/* end of isrINT_TIM1CH1 */&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;FONT face="Courier New"&gt;/*&lt;BR /&gt;** ===================================================================&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Interrupt handler : isrINT_TIM1CH0&lt;BR /&gt;**&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Description :&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; User interrupt service routine.&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Parameters&amp;nbsp; : None&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Returns&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : Nothing&lt;BR /&gt;** ===================================================================&lt;BR /&gt;*/&lt;BR /&gt;__interrupt void isrINT_TIM1CH0(void)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp; /* Write your interrupt code here ... */&amp;nbsp;&lt;BR /&gt;&amp;nbsp; PTE_PTE0 =~PTE_PTE0;&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="Courier New"&gt;}&lt;BR /&gt;/* end of isrINT_TIM1CH0 */&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="Courier New"&gt;&lt;/FONT&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;FONT face="Courier New"&gt;/* Initialization of the CPU registers in FLASH */&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="Courier New"&gt;&lt;/FONT&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;FONT face="Courier New"&gt;#define UNASSIGNED_ISR 0xFFFF&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Unassigned interrupt service routine */&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="Courier New"&gt;extern void _Startup(void);&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* reset interrupt service routine */&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="Courier New"&gt;void (* const _vect[])() @0xFFDC = {&amp;nbsp;&amp;nbsp; // Interrupt vector table&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; UNASSIGNED_ISR,&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Int.no.&amp;nbsp; 0 INT_TBM (at FFDC)&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Unassigned */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; UNASSIGNED_ISR,&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Int.no.&amp;nbsp; 1 INT_ADC (at FFDE)&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Unassigned */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; UNASSIGNED_ISR,&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Int.no.&amp;nbsp; 2 INT_KBD (at FFE0)&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Unassigned */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; UNASSIGNED_ISR,&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Int.no.&amp;nbsp; 3 INT_SCITransmit (at FFE2)&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Unassigned */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; UNASSIGNED_ISR,&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Int.no.&amp;nbsp; 4 INT_SCIReceive (at FFE4)&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Unassigned */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; UNASSIGNED_ISR,&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Int.no.&amp;nbsp; 5 INT_SCIError (at FFE6)&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Unassigned */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; UNASSIGNED_ISR,&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Int.no.&amp;nbsp; 6 INT_SPITransmit (at FFE8)&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Unassigned */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; UNASSIGNED_ISR,&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Int.no.&amp;nbsp; 7 INT_SPIReceive (at FFEA)&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Unassigned */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; UNASSIGNED_ISR,&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Int.no.&amp;nbsp; 8 INT_TIM2Ovr (at FFEC)&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Unassigned */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; UNASSIGNED_ISR,&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Int.no.&amp;nbsp; 9 INT_TIM2CH1 (at FFEE)&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Unassigned */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; UNASSIGNED_ISR,&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Int.no. 10 INT_TIM2CH0 (at FFF0)&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Unassigned */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; isrINT_TIM1Ovr,&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Int.no. 11 INT_TIM1Ovr (at FFF2)&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Used */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; isrINT_TIM1CH1,&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Int.no. 12 INT_TIM1CH1 (at FFF4)&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Used */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; isrINT_TIM1CH0,&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Int.no. 13 INT_TIM1CH0 (at FFF6)&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Used */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; UNASSIGNED_ISR,&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Int.no. 14 INT_PLL (at FFF8)&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Unassigned */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; UNASSIGNED_ISR,&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Int.no. 15 INT_IRQ (at FFFA)&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Unassigned */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; UNASSIGNED_ISR,&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Int.no. 16 INT_SWI (at FFFC)&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Unassigned */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; _Startup&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Int.no. 17 INT_RESET (at FFFE)&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Reset vector */&lt;BR /&gt;};&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;FONT face="Courier New"&gt;/* END */&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="Courier New"&gt;/*&lt;BR /&gt;** ###################################################################&lt;BR /&gt;**&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; This file was created by UNIS Processor Expert 3.00 [03.89]&lt;BR /&gt;**&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; for the Freescale HC08 series of microcontrollers.&lt;BR /&gt;**&lt;BR /&gt;** ###################################################################&lt;BR /&gt;*/&lt;BR /&gt;&lt;/FONT&gt;&lt;/P&gt;&lt;DIV&gt;&lt;FONT face="Courier New"&gt;&lt;/FONT&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 Oct 2007 23:31:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/MC68HC908GP32CP-Changing-output-on-TIM-interrupt/m-p/159419#M9481</guid>
      <dc:creator>pmouse</dc:creator>
      <dc:date>2007-10-30T23:31:25Z</dc:date>
    </item>
    <item>
      <title>Re: MC68HC908GP32CP Changing output on TIM interrupt</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/MC68HC908GP32CP-Changing-output-on-TIM-interrupt/m-p/159420#M9482</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Hi Peter,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Without going into whether you are doing this the best way (others have already made suggestions here), the reason your interrupts are not working properly is that you are not resetting the flags that generate them.&lt;/DIV&gt;&lt;DIV&gt;You need to read the register that contains the flag and then write a zero to the bit to clear it and allow it to trip again next time.&lt;/DIV&gt;&lt;DIV&gt;For the overflow you read T1SC then clear bit 7 and,&lt;/DIV&gt;&lt;DIV&gt;for the compare you read T1SC1 then clear bit 7&lt;/DIV&gt;&lt;DIV&gt;This would normally be done within each corresponding ISR.&lt;/DIV&gt;&lt;DIV&gt;You can see where PE has done this in the initialisation routine.&lt;/DIV&gt;&lt;DIV&gt;Add the appropriate read then clear to each ISR and see how you go then.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 31 Oct 2007 03:46:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/MC68HC908GP32CP-Changing-output-on-TIM-interrupt/m-p/159420#M9482</guid>
      <dc:creator>peg</dc:creator>
      <dc:date>2007-10-31T03:46:56Z</dc:date>
    </item>
    <item>
      <title>Re: MC68HC908GP32CP Changing output on TIM interrupt</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/MC68HC908GP32CP-Changing-output-on-TIM-interrupt/m-p/159421#M9483</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;Thank you all for your replies! I knew the interrupt has to be cleared somehow, but just don't know how. I have read some application notes and in their source code they never cleared the interrupt flag. Hence I assumed that it doesn't need to be done. I'll try the suggestion tomorrow.&lt;BR /&gt;&lt;BR /&gt;Regards,&lt;BR /&gt;&lt;BR /&gt;PQ&lt;BR /&gt;&lt;BR /&gt;Message Edited by pmouse on &lt;SPAN class="date_text"&gt;2007-10-30&lt;/SPAN&gt; &lt;SPAN class="time_text"&gt;09:57 PM&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 31 Oct 2007 04:57:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/MC68HC908GP32CP-Changing-output-on-TIM-interrupt/m-p/159421#M9483</guid>
      <dc:creator>pmouse</dc:creator>
      <dc:date>2007-10-31T04:57:26Z</dc:date>
    </item>
    <item>
      <title>Re: MC68HC908GP32CP Changing output on TIM interrupt</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/MC68HC908GP32CP-Changing-output-on-TIM-interrupt/m-p/159422#M9484</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV align="left"&gt;Hey guys,&lt;BR /&gt;The timers are now working. Thanks a lot!&lt;BR /&gt;However, I'm now having trouble handling the interrupt from the ADC. I believe it is the same problem, ie., you need to clear a flag somewhere.&lt;BR /&gt;How do you find out which flag to clear? the product documentation does not mention this clearly.&lt;BR /&gt;&lt;BR /&gt;Regards,&lt;BR /&gt;&lt;BR /&gt;PQ&lt;BR /&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 31 Oct 2007 22:52:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/MC68HC908GP32CP-Changing-output-on-TIM-interrupt/m-p/159422#M9484</guid>
      <dc:creator>pmouse</dc:creator>
      <dc:date>2007-10-31T22:52:02Z</dc:date>
    </item>
    <item>
      <title>Re: MC68HC908GP32CP Changing output on TIM interrupt</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/MC68HC908GP32CP-Changing-output-on-TIM-interrupt/m-p/159423#M9485</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;Usually it is as simple as reading the data register of the generating source.&amp;nbsp; Sometime it is more complicated.&amp;nbsp; It is clear in the manual once you learn where and what to look for as you are doing now.&lt;BR /&gt;&lt;BR /&gt;Good Luck,&lt;BR /&gt;&lt;BR /&gt;Peter House&lt;BR /&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 31 Oct 2007 23:24:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/MC68HC908GP32CP-Changing-output-on-TIM-interrupt/m-p/159423#M9485</guid>
      <dc:creator>PeterHouse</dc:creator>
      <dc:date>2007-10-31T23:24:10Z</dc:date>
    </item>
    <item>
      <title>Re: MC68HC908GP32CP Changing output on TIM interrupt</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/MC68HC908GP32CP-Changing-output-on-TIM-interrupt/m-p/159424#M9486</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Hi,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Here is the relevant location in the manual that tells you this:&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;B&gt;&lt;FONT face="Helvetica-Bold" size="3"&gt;&lt;/FONT&gt;&lt;/B&gt;&lt;P align="left"&gt;&lt;B&gt;&lt;FONT face="Helvetica-Bold" size="3"&gt;AIEN — ADC Interrupt Enable Bit&lt;/FONT&gt;&lt;/B&gt;&lt;/P&gt;&lt;FONT face="Helvetica" size="3"&gt;&lt;/FONT&gt;&lt;P align="left"&gt;&lt;FONT face="Helvetica" size="3"&gt;When this bit is set, an interrupt is generated at the end of an ADC conversion. The interrupt signal is cleared when the data register is read or the status/control register is written. Reset clears the AIEN bit.&lt;/FONT&gt;&lt;/P&gt;&lt;P align="left"&gt;&lt;FONT face="Helvetica" size="3"&gt;1 = ADC interrupt enabled&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="Helvetica" size="3"&gt;0 = ADC interrupt disabled&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="Helvetica" size="3"&gt;&amp;nbsp;&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="Helvetica" size="3"&gt;&lt;FONT size="2"&gt;This should be fairly automatic in most cases as you would probably read from these anyway. However a trap for you if you don't.&lt;/FONT&gt;&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="Helvetica" size="3"&gt;&amp;nbsp;&lt;/FONT&gt;&lt;/P&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 01 Nov 2007 05:29:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/MC68HC908GP32CP-Changing-output-on-TIM-interrupt/m-p/159424#M9486</guid>
      <dc:creator>peg</dc:creator>
      <dc:date>2007-11-01T05:29:47Z</dc:date>
    </item>
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