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    <title>topic Re: Bidirectional SPI routine in 8-bit Microcontrollers</title>
    <link>https://community.nxp.com/t5/8-bit-Microcontrollers/HCS08QG8-Bidirectional-SPI-routine/m-p/126124#M930</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;I forgot to mention that its a HCS08QG8.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Upon further investigation, a small delay is requred between SCID writes.&amp;nbsp; The simulator indicates the two bytes sent.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;void init_DAC(void)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp;unsigned char temp;&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;&amp;nbsp;CS = LOW;&lt;BR /&gt;&amp;nbsp;temp = SPIS;&lt;BR /&gt;&amp;nbsp;SPID = CONTROL_BYTE1;&lt;BR /&gt;&amp;nbsp;while(!SPIS_SPTEF);&lt;BR /&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp;temp = 5;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;while(--temp);&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // delay&lt;BR /&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;temp = SPIS;&lt;BR /&gt;&amp;nbsp;SPID = DAC_INIT_VALUE;&lt;BR /&gt;&amp;nbsp;while(!SPIS_SPTEF);&lt;BR /&gt;&amp;nbsp;while(SCLK);&lt;BR /&gt;&amp;nbsp;CS = HIGH;&lt;BR /&gt;}&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Remark on the SPRF flag, it will get set in&amp;nbsp;single wire bidirectional mode when the BIDIROE is&amp;nbsp;set (output )?&amp;nbsp;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 14 Mar 2007 09:44:25 GMT</pubDate>
    <dc:creator>FC</dc:creator>
    <dc:date>2007-03-14T09:44:25Z</dc:date>
    <item>
      <title>HCS08QG8 - Bidirectional SPI routine</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/HCS08QG8-Bidirectional-SPI-routine/m-p/126122#M928</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Hello,&lt;/DIV&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt;CodeWarrior simulator does not work for this simple bidirectional SPI. Note, the device is a SPI compatible DAC (MAX548A) and only bytes are tranferred, no reads&lt;/DIV&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt;The simulator does not set the second SPSTEF flag. The first SPSTEF is set almost immediately due to an idle SPI. Rather, the simulator sets SPRF when the second transfer starts, but its output mode.&lt;/DIV&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt;void init_DAC(void)&lt;BR /&gt;{&lt;BR /&gt; unsigned char temp;&lt;BR /&gt;&lt;BR /&gt; CS = LOW;&lt;BR /&gt; temp = SPIS;&lt;BR /&gt; SPID = 0xFF;&lt;BR /&gt; while(!SPIS_SPTEF);&lt;BR /&gt; temp = SPIS;&lt;BR /&gt; SPID = 0x00;&lt;BR /&gt; while(!SPIS_SPTEF);&lt;BR /&gt; while(SCLK);&lt;BR /&gt; CS = HIGH;&lt;BR /&gt;}&lt;/DIV&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt;Note, CPOL and CPHA are 0 according to the MAX548A datasheet.&lt;/DIV&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Alban Edit: FSL Part Number in Subject line.&lt;/SPAN&gt;&lt;P&gt;Message Edited by Alban on &lt;SPAN class="date_text"&gt;2007-03-14&lt;/SPAN&gt; &lt;SPAN class="time_text"&gt;11:33 AM&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 14 Mar 2007 08:29:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/HCS08QG8-Bidirectional-SPI-routine/m-p/126122#M928</guid>
      <dc:creator>FC</dc:creator>
      <dc:date>2007-03-14T08:29:24Z</dc:date>
    </item>
    <item>
      <title>Re: Bidirectional SPI routine</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/HCS08QG8-Bidirectional-SPI-routine/m-p/126123#M929</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="2"&gt;Hello,&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="2"&gt;&lt;/FONT&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="2"&gt;Whether you&amp;nbsp;use the returned data or not, I believe you will need to read SPID, with SPIF flag set,&amp;nbsp;to prevent an over-run condition.&amp;nbsp; You will also need to wait until SPIF flag is set (for the second byte) before raising CS.&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="2"&gt;&lt;/FONT&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="2"&gt;Perhaps the following modified&amp;nbsp;code -&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="2"&gt;&lt;/FONT&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT face="Courier New" size="2"&gt;&lt;/FONT&gt;&lt;DIV&gt;&lt;FONT face="Courier New" size="2"&gt;void init_DAC(void)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;unsigned char temp;&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;CS = LOW;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;temp = SPIS;&amp;nbsp;&amp;nbsp; /*&amp;nbsp;SPTEF flag assumed already set */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;SPID = 0xFF;&amp;nbsp;&amp;nbsp; /* First command byte */&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT face="Courier New" size="2"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;while (!SPIS_SPIF);&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT face="Courier New" size="2"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;temp =&amp;nbsp;SPID;&amp;nbsp;&amp;nbsp; /* Clears SPIF flag */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;SPID =&amp;nbsp;0x00;&amp;nbsp;&amp;nbsp; /* Second command byte */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;while (!SPIS_SPIF);&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT face="Courier New" size="2"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;temp = SPID&amp;nbsp;&amp;nbsp; /* Clears SPIF flag */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;CS = HIGH;&lt;BR /&gt;}&lt;/FONT&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="2"&gt;&lt;/FONT&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="2"&gt;Regards,&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="2"&gt;Mac&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;P&gt;Message Edited by bigmac on &lt;SPAN class="date_text"&gt;2007-03-14&lt;/SPAN&gt;&lt;SPAN class="time_text"&gt;01:35 PM&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 14 Mar 2007 09:34:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/HCS08QG8-Bidirectional-SPI-routine/m-p/126123#M929</guid>
      <dc:creator>bigmac</dc:creator>
      <dc:date>2007-03-14T09:34:26Z</dc:date>
    </item>
    <item>
      <title>Re: Bidirectional SPI routine</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/HCS08QG8-Bidirectional-SPI-routine/m-p/126124#M930</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;I forgot to mention that its a HCS08QG8.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Upon further investigation, a small delay is requred between SCID writes.&amp;nbsp; The simulator indicates the two bytes sent.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;void init_DAC(void)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp;unsigned char temp;&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;&amp;nbsp;CS = LOW;&lt;BR /&gt;&amp;nbsp;temp = SPIS;&lt;BR /&gt;&amp;nbsp;SPID = CONTROL_BYTE1;&lt;BR /&gt;&amp;nbsp;while(!SPIS_SPTEF);&lt;BR /&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp;temp = 5;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;while(--temp);&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // delay&lt;BR /&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;temp = SPIS;&lt;BR /&gt;&amp;nbsp;SPID = DAC_INIT_VALUE;&lt;BR /&gt;&amp;nbsp;while(!SPIS_SPTEF);&lt;BR /&gt;&amp;nbsp;while(SCLK);&lt;BR /&gt;&amp;nbsp;CS = HIGH;&lt;BR /&gt;}&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Remark on the SPRF flag, it will get set in&amp;nbsp;single wire bidirectional mode when the BIDIROE is&amp;nbsp;set (output )?&amp;nbsp;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 14 Mar 2007 09:44:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/HCS08QG8-Bidirectional-SPI-routine/m-p/126124#M930</guid>
      <dc:creator>FC</dc:creator>
      <dc:date>2007-03-14T09:44:25Z</dc:date>
    </item>
    <item>
      <title>Re: Bidirectional SPI routine</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/HCS08QG8-Bidirectional-SPI-routine/m-p/126125#M931</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Hi FC,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;If this is the case then it would be due to imperfect simulation.&lt;/DIV&gt;&lt;DIV&gt;On the actual device if you know there are no pending SPI transfers you can load SPID twice in a row as in:&lt;/DIV&gt;&lt;DIV&gt;SPID = CONTROL_BYTE1;&lt;BR /&gt;SPID = DAC_INIT_VALUE;&lt;BR /&gt;&lt;/DIV&gt;&lt;DIV&gt;then just hang around till its done to drop the CS. The first write falls through to the shift register faster than you can load the next byte in.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;BTW what is:&lt;/DIV&gt;&lt;DIV&gt;while(SCLK);&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;BR /&gt;&amp;nbsp;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 14 Mar 2007 10:27:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/HCS08QG8-Bidirectional-SPI-routine/m-p/126125#M931</guid>
      <dc:creator>peg</dc:creator>
      <dc:date>2007-03-14T10:27:00Z</dc:date>
    </item>
    <item>
      <title>Re: Bidirectional SPI routine</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/HCS08QG8-Bidirectional-SPI-routine/m-p/126126#M932</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Hello All,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;The back to back writes makes sense because it will wake only 2 clock cyles for the first SPSTEF flag to set.&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;#define SCLK&amp;nbsp; PTBD_PTBD2&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;while(SCLK);&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Maybe&amp;nbsp;not needed, but its to ensure the&amp;nbsp;SPI clock is low before raising the CS line. It is in one of application notes.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Also, the simulator does&amp;nbsp;show the SPTEF flag low&amp;nbsp;on the second write.&amp;nbsp; The SPI clock is&amp;nbsp;set to 1MHz,&amp;nbsp;this flag&amp;nbsp;should be abled to be viewed by single stepping.&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Clarrify this, it appears the SPRF flag will get set even when the SPI is set to output in singe wire mode?&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 14 Mar 2007 10:46:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/HCS08QG8-Bidirectional-SPI-routine/m-p/126126#M932</guid>
      <dc:creator>FC</dc:creator>
      <dc:date>2007-03-14T10:46:33Z</dc:date>
    </item>
    <item>
      <title>Re: Bidirectional SPI routine</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/HCS08QG8-Bidirectional-SPI-routine/m-p/126127#M933</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Hi FC,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;As the simulator, as is usual, steps instructions and not cycles, you will not see the flag as it is on for less than an instruction.&lt;/DIV&gt;&lt;DIV&gt;I believe the SPRF flag functions as normal even though valid data is not being clocked in in this mode. This is also because "data finished being shifted in" is exactly the same as "data finished being shifted out"&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 14 Mar 2007 11:06:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/HCS08QG8-Bidirectional-SPI-routine/m-p/126127#M933</guid>
      <dc:creator>peg</dc:creator>
      <dc:date>2007-03-14T11:06:15Z</dc:date>
    </item>
    <item>
      <title>Re: Bidirectional SPI routine</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/HCS08QG8-Bidirectional-SPI-routine/m-p/126128#M934</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Here is the way I have done it using the 9S08AW32.&amp;nbsp; Should work the same.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Note:&amp;nbsp; This&amp;nbsp;was ported from&amp;nbsp;some old 705 code, so the X register is used to manipulate&amp;nbsp;and maintain a stack(used too much in the code to change this).&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Hope it helps.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;;&lt;BR /&gt;;&amp;nbsp;Read in a Word from the EEPROM&lt;BR /&gt;;&amp;nbsp;E - TOS = Address of the Word&lt;BR /&gt;;&amp;nbsp;R - TOS &amp;amp; TOS+1 = Word Read&lt;BR /&gt;;&amp;nbsp;L - A&lt;BR /&gt;;&lt;/DIV&gt;&lt;DIV&gt;RD_93XX:&lt;BR /&gt;&amp;nbsp;LDA SPI1S&amp;nbsp;&amp;nbsp; ;dummy read to clear flags&lt;BR /&gt;&amp;nbsp;LDA SPI1D&amp;nbsp;&amp;nbsp; ;dummy read to clear Data reg&lt;BR /&gt;&amp;nbsp;LDA&amp;nbsp;#$80&amp;nbsp;&amp;nbsp;;Add Read Command&lt;BR /&gt;&amp;nbsp;STA&amp;nbsp;,X&amp;nbsp;&amp;nbsp;&amp;nbsp;;Save Command Bits&lt;BR /&gt;&amp;nbsp;LDA&amp;nbsp;1,X&amp;nbsp;&amp;nbsp;&amp;nbsp;;Load Address from Para Stack&lt;BR /&gt;&amp;nbsp;AND&amp;nbsp;#$3F&amp;nbsp;&amp;nbsp;;Mask Address Bits&lt;BR /&gt;&amp;nbsp;ORA&amp;nbsp;,X&amp;nbsp;&amp;nbsp;&amp;nbsp;;Add Command Bits&lt;BR /&gt;&amp;nbsp;STA&amp;nbsp;1,X&amp;nbsp;&amp;nbsp;&amp;nbsp;;Store on Parameter Stack&lt;BR /&gt;&amp;nbsp;; write command&lt;BR /&gt;&amp;nbsp;PUL_A&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;Load Character from Stack&lt;BR /&gt;&amp;nbsp;STA&amp;nbsp;SPI1D&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;Send Character&lt;BR /&gt;&amp;nbsp;BSR WAIT_SPI&amp;nbsp;&amp;nbsp;&amp;nbsp; ;wait for spi to finish&lt;BR /&gt;&amp;nbsp;LDA SPI1D&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;dummy read to clear Data reg&lt;BR /&gt;&amp;nbsp;; READ BYTE&lt;BR /&gt;&amp;nbsp;STA&amp;nbsp;SPI1D&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;dummy write&lt;BR /&gt;&amp;nbsp;BSR WAIT_SPI&amp;nbsp;&amp;nbsp;&amp;nbsp; ;wait for spi to finish&lt;BR /&gt;&amp;nbsp;LDA SPI1D&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;read byte&lt;BR /&gt;&amp;nbsp;STA ,X&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;store byte&lt;BR /&gt;&amp;nbsp;DECX&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;Dec Parameter Stack Ptr&lt;BR /&gt;&amp;nbsp;; READ BYTE&lt;BR /&gt;&amp;nbsp;STA&amp;nbsp;SPI1D&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;dummy write&lt;BR /&gt;&amp;nbsp;BSR WAIT_SPI&amp;nbsp;&amp;nbsp;&amp;nbsp; ;wait for spi to finish&lt;BR /&gt;&amp;nbsp;LDA SPI1D&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;read byte&lt;BR /&gt;&amp;nbsp;STA ,X&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;store byte&lt;BR /&gt;&amp;nbsp;DECX&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;Dec Parameter Stack Ptr&lt;BR /&gt;&amp;nbsp;RTS&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;return&lt;BR /&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;;&lt;BR /&gt;;&amp;nbsp;Write to EEPROM&lt;BR /&gt;;&amp;nbsp;E - TOS = Address of EEPROM&lt;BR /&gt;;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; TOS+1 &amp;amp; TOS+2 = Word to be Sent&lt;BR /&gt;;&amp;nbsp;R - none&lt;BR /&gt;;&amp;nbsp;L - A&lt;BR /&gt;;&lt;/DIV&gt;&lt;DIV&gt;WR_93XX:&lt;BR /&gt;&amp;nbsp;LDA SPI1S&amp;nbsp;&amp;nbsp; ;dummy read to clear flags&lt;BR /&gt;&amp;nbsp;LDA SPI1D&amp;nbsp;&amp;nbsp; ;dummy read to clear Data reg&lt;BR /&gt;&amp;nbsp;LDA&amp;nbsp;#$40&amp;nbsp;&amp;nbsp;;Write Command&lt;BR /&gt;&amp;nbsp;STA&amp;nbsp;,X&amp;nbsp;&amp;nbsp;&amp;nbsp;;Save Command Bits&lt;BR /&gt;&amp;nbsp;LDA&amp;nbsp;1,X&amp;nbsp;&amp;nbsp;&amp;nbsp;;Load Address from Para Stack&lt;BR /&gt;&amp;nbsp;AND&amp;nbsp;#$3F&amp;nbsp;&amp;nbsp;;Mask Address Bits&lt;BR /&gt;&amp;nbsp;ORA&amp;nbsp;,X&amp;nbsp;&amp;nbsp;&amp;nbsp;;Add Command Bits&lt;BR /&gt;&amp;nbsp;STA&amp;nbsp;1,X&amp;nbsp;&amp;nbsp;&amp;nbsp;;Store on Parameter Stack&lt;BR /&gt;&amp;nbsp;; write command&lt;BR /&gt;&amp;nbsp;PUL_A&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;Load Character from Stack&lt;BR /&gt;&amp;nbsp;STA&amp;nbsp;SPI1D&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;Send Character&lt;BR /&gt;&amp;nbsp;BSR WAIT_SPI&amp;nbsp;&amp;nbsp;&amp;nbsp; ;wait for spi to finish&lt;BR /&gt;&amp;nbsp;LDA SPI1D&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;dummy read to clear Data reg&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;JSR&amp;nbsp;SWAP&amp;nbsp;&amp;nbsp;&amp;nbsp;; Swap Bytes&lt;BR /&gt;&amp;nbsp;;write byte&lt;BR /&gt;&amp;nbsp;PUL_A&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ; Load Character from Stack&lt;BR /&gt;&amp;nbsp;STA&amp;nbsp;SPI1D&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ; Send Character&lt;BR /&gt;&amp;nbsp;BSR WAIT_SPI&amp;nbsp;&amp;nbsp;&amp;nbsp; ;wait for spi to finish&lt;BR /&gt;&amp;nbsp;LDA SPI1D&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;dummy read to clear Data reg&lt;BR /&gt;&amp;nbsp;;write byte&lt;BR /&gt;&amp;nbsp;PUL_A&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ; Load Character from Stack&lt;BR /&gt;&amp;nbsp;STA&amp;nbsp;SPI1D&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ; Send Character&lt;BR /&gt;&amp;nbsp;BSR WAIT_SPI&amp;nbsp;&amp;nbsp;&amp;nbsp; ;wait for spi to finish&lt;BR /&gt;&amp;nbsp;LDA SPI1D&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;dummy read to clear Data reg&lt;BR /&gt;&amp;nbsp;RTS&lt;BR /&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;; WAIT FOR SPI TRANSFER TO COMPLETE&lt;BR /&gt;WAIT_SPI:&lt;BR /&gt;&amp;nbsp;BRSET&amp;nbsp;SPI1S_SPTEF,SPI1S,WAIT_SPI0&amp;nbsp;; Check for Xmit Reg Empty&lt;BR /&gt;&amp;nbsp;JSR&amp;nbsp;PAUSE&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ; No Wait&lt;BR /&gt;&amp;nbsp;BRA&amp;nbsp;WAIT_SPI&lt;BR /&gt;WAIT_SPI0:&lt;BR /&gt;&amp;nbsp;RTS&lt;BR /&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 14 Mar 2007 22:28:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/HCS08QG8-Bidirectional-SPI-routine/m-p/126128#M934</guid>
      <dc:creator>baddad</dc:creator>
      <dc:date>2007-03-14T22:28:35Z</dc:date>
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