topic Re: JM60 internal osc problem in 8-bit Microcontrollers

JM60 internal osc problem

donw — Mon, 23 Nov 2009 07:44:27 GMT

Hi all

I have a 908JM60 which is initilised with the code below, so the internal osc gives a bus ~8mhz

This work fine, until I try to call the code again while running, if which case it loops on the while_Cpu0

(ie the lock bit is never set)

What is wrong?

sei
        ; MCGC2: BDIV=1,RANGE=0,HGO=0,LP=0,EREFS=0,ERCLKEN=0,EREFSTEN=0
        MOV     #$040,MCGC2             ; Set MCGC2 register
        ; MCGC1: CLKS=0,RDIV=0,IREFS=1,IRCLKEN=1,IREFSTEN=0
        MOV     #$06,MCGC1             ; Set MCGC1 register
        ; MCGC3: LOLIE=0,PLLS=0,CME=0,VDIV=1
        MOV     #$01,MCGC3             ; Set MCGC3 register
while_Cpu0:                            ; Wait until FLL is locked
         BRCLR   6,MCGSC,while_Cpu0
        cli

rts

Re: JM60 internal osc problem

yzhou — Tue, 01 Dec 2009 16:03:33 GMT

Hi donw,

Is it possible caused by your calling this routine in order to switch from PEE mode to FEI mode, which is not a standard method for mode switching?

Thanks,

Zhou

Re: JM60 internal osc problem

donw — Tue, 01 Dec 2009 17:03:39 GMT

The problem seems to occur when changing back from an external xtal mode, which has

MOV #$046,MCGC2 ; Set MCGC2 register

so long as the code above has

MOV #$040,MCGC2 ; Set MCGC2 register

and not

MOV #$046,MCGC2 ; Set MCGC2 register

then it works OK.

Not sure what the bit feild EREFS really does..