topic Re: MC68 HC908JB16 MON08 Source code in 8-bit Microcontrollers

MC68 HC908JB16 MON08 Source code

Inliner — Mon, 16 Feb 2009 20:11:18 GMT

Hi all, please, can anyone tell me about MON08 routines? i'm looking for source code of ROM MON08 functions, how it's implemented. Is it possible to find them? Alse, please, is there some ERRATA about mask codes on such chips? what the differense between L80P and 2L80P masks ? tanx

Re: MC68 HC908JB16 MON08 Source code

peg — Tue, 17 Feb 2009 06:18:58 GMT

Hi Inliner,

I don't think this is available. At least no one was offering it to me when I was looking for this.
There only seems to be 1 errata shown here for the 1L52P.

Re: MC68 HC908JB16 MON08 Source code

bigmac — Tue, 17 Feb 2009 08:33:52 GMT

Hello,

Using an EVB for the particular HC908 device, I seem to recall that it was possible to disassemble the ROM based code within the device. However, that is the simple part. The code then needs to be reverse engineered and commented to make sense of it.

I once did it for the flash programming routines within a '908QY device.

Regards,
Mac

Re: MC68 HC908JB16 MON08 Source code

Inliner — Thu, 19 Feb 2009 02:59:33 GMT

Proc_FF:
pshx
psha
lda #$14
ldx #$1C
loc_1:
brclr 0 PTA *+3
sbc #0
dbnzx loc_1
rola
pula
pulx
rts

Found this code inside, maybe anyone can tell the sense of this code?

Re: MC68 HC908JB16 MON08 Source code

bigmac — Fri, 20 Feb 2009 07:49:58 GMT

Hello,

For the MCU you are using, I assume that monitor mode uses PTA0 for serial communications. It is usual that the data rate will be 9600 baud for a bus frequency of 2.4576MHz. Now for the sub-routine:

Proc_FF: pshx
          psha
          lda   #20
          ldx   #28

loc_1: ; 10 cycle loop
brclr 0,PTA,*+3 ; [5] CF = PTA0 state

sbc #0 ; [2] Subtract 0 or 1

dbnzx loc_1 ; [3] Total loop duration 280 cycles

rola ; CF set for negative value

          pula
          pulx
          rts

It would seem that this sub-routine is part of the serial communications process. The total loop duration of 280 cycles appears to closely approximate one bit period at 9600 baud.

I guess this is used to detect a data bit state in the presence of noise. The state is tested 28 times, and needs to be high for about 70 percent of the samples for a logic high to be decoded. In this case, the ACC will have decremented to a negative value, and the ROL instruction will set the carry flag (CF).

Regards,

Mac