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    <title>8-bit MicrocontrollersのトピックRe: MergedBits write problem on QG8</title>
    <link>https://community.nxp.com/t5/8-bit-Microcontrollers/MergedBits-write-problem-on-QG8/m-p/142137#M6142</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;P&gt;Hi Rob,&lt;/P&gt;&lt;P&gt;FCDIV is "write once" which is possibly causing your problem.&lt;/P&gt;&lt;P&gt;Note to Freescale:&lt;/P&gt;&lt;P&gt;At 4.5.2 (the registers desciption) this is NOT mentioned, although it is mentioned at 4.7.1&lt;/P&gt;&lt;P&gt;Regards David&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 06 Jul 2006 05:36:20 GMT</pubDate>
    <dc:creator>peg</dc:creator>
    <dc:date>2006-07-06T05:36:20Z</dc:date>
    <item>
      <title>MergedBits write problem on QG8</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/MergedBits-write-problem-on-QG8/m-p/142136#M6141</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;SPAN&gt;Anyone know why this isn't working?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN style="font-family: 'Courier New';"&gt;FCDIV_DIV = 19; // divisor for FLASH clock divider (decimal)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;In the MC9S08QG8.h header file, FCDIV_DIV is defined as the merged bits (_FCDIV.MergedBits.grpDIV) of the FCDIV register. I realize that the foolproof method of setting these bits accordingly would be simply:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN style="font-family: 'Courier New';"&gt;FCDIV = 0x13; // FLASH clock initialization to 200kHz for 4MHz bus clock&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;But it's more readable the other way, since that's how the datasheet lists the DIV bits.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I know that using the merged bits method works, as I've used it successfully for the timer register:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN style="font-family: 'Courier New';"&gt;TPMSC_CLKSx = 0b01; // Select BUS clock&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Any ideas why the QG8 doesn't like this method in the FCDIV register?&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 06 Jul 2006 02:17:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/MergedBits-write-problem-on-QG8/m-p/142136#M6141</guid>
      <dc:creator>irob</dc:creator>
      <dc:date>2006-07-06T02:17:57Z</dc:date>
    </item>
    <item>
      <title>Re: MergedBits write problem on QG8</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/MergedBits-write-problem-on-QG8/m-p/142137#M6142</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;P&gt;Hi Rob,&lt;/P&gt;&lt;P&gt;FCDIV is "write once" which is possibly causing your problem.&lt;/P&gt;&lt;P&gt;Note to Freescale:&lt;/P&gt;&lt;P&gt;At 4.5.2 (the registers desciption) this is NOT mentioned, although it is mentioned at 4.7.1&lt;/P&gt;&lt;P&gt;Regards David&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 06 Jul 2006 05:36:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/MergedBits-write-problem-on-QG8/m-p/142137#M6142</guid>
      <dc:creator>peg</dc:creator>
      <dc:date>2006-07-06T05:36:20Z</dc:date>
    </item>
    <item>
      <title>Re: MergedBits write problem on QG8</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/MergedBits-write-problem-on-QG8/m-p/142138#M6143</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;Ahh, ok. That's good enough for me.&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 06 Jul 2006 05:42:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/MergedBits-write-problem-on-QG8/m-p/142138#M6143</guid>
      <dc:creator>irob</dc:creator>
      <dc:date>2006-07-06T05:42:39Z</dc:date>
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