8-bit MicrocontrollersのトピックRe: 9SO16A internal oscillator

MC9S08GT16A internal oscillator

DanielMorley — Sat, 09 Dec 2006 05:16:08 GMT

I am trying to configure my code to turn on the internal oscillator with out an external one. The code I am writing comes from the part data sheet.

ICGC1 = 0b00101000;

  ICGC2 = 0b00110001;

This data sheet also recomends that I assign IGCS1 and IGCS2 with dont care's. The C compiler will not take don't cares. So I omitted this step. Will the code work with out an external register?

(Alban corrected title: device name)

Message Edited by Alban on 2006-12-11 09:25 PM

Re: 9SO16A internal oscillator

peg — Sat, 09 Dec 2006 07:08:44 GMT

Hi Daniel,

What is a 9SO16A?

I thought maybe you meant 9S08GT16A but then your values are fairly obviously wrong.

e.g. REFS is 1 = external clock.

So I guess we better figure out which device first.

Regards

Peg

Re: 9SO16A internal oscillator

DanielMorley — Tue, 12 Dec 2006 00:28:21 GMT

MC9S08GT16A is the chip i am using. I took the code straight from the data sheet. Example three no external oscillator.

Re: 9SO16A internal oscillator

peg — Tue, 12 Dec 2006 04:49:25 GMT

Hi Daniel,

Sorry I misled you before. REFS is only relevant in the external modes.

What you have is correct for FEI mode and gives a buss clock of 5.4MHz.

I have an actual product that uses:

ICGC1 00001000

ICGC2 01110000

This gives 19.9954MHz in FEI (trimmed)

The only difference is you have x10/2

where I have x18/1

Regards

Peg

Re: 9SO16A internal oscillator

DanielMorley — Tue, 12 Dec 2006 04:56:47 GMT

Can I ommit the ICGS1 & UCGS2, ICGFLTU/L statements out for the oscillator to work. Or will the code be sufficiant to start up the oscillator.

Re: 9SO16A internal oscillator

peg — Tue, 12 Dec 2006 05:00:38 GMT

Yes you can!

Here is my entire ICG initialisation:

Code:

*********** Set-up ICG to clock the bus at 19.9954 MHz **********************  LDA NVICGTRIM  ;get calibration value from FLASH  STA ICGTRM   ;set oscillator trim value  MOV #(mMFD2|mMFD1|mMFD0),ICGC2 ;sets MFD divider  MOV #mCLKS0,ICGC1  ;243 kHz -> 19.9954 MHz bus rate  BRCLR LOCK,ICGS1,*  ;loop until FLL locks

Regards

Peg