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    <title>topic Re: Vector Redirection and Memory Protection in 8-bit Microcontrollers</title>
    <link>https://community.nxp.com/t5/8-bit-Microcontrollers/Vector-Redirection-and-Memory-Protection/m-p/136519#M4380</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello TonyP,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;What would be the disadvantage of using a simple jump to the re-directed ISR routine?&amp;nbsp; Alternatively, the routine call could use JSR (with the ISR_Routine ending with RTS, rather than RTI).&amp;nbsp; These possibilities&amp;nbsp;would seem more straight forward - perhaps something like the following code&amp;nbsp;for the jump case.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;PRE&gt;ISR_Routine         ...                    rtiRedirect_1          jmp    ISR_RoutineHardVector_1        dc.w   Redirect_1

&lt;/PRE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;For C coding, maybe the following:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;PRE&gt;void ISR_func( void){   ...}interrupt Interrupt_number Redirect_1( void){   __asm jsr ISR_func;}&lt;/PRE&gt;&lt;P&gt;&amp;nbsp;The various Redirect functions would need to be placed at&amp;nbsp;predetermined positions known in advance to the entry code.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Mac&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 01 Sep 2010 07:53:25 GMT</pubDate>
    <dc:creator>bigmac</dc:creator>
    <dc:date>2010-09-01T07:53:25Z</dc:date>
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      <title>Vector Redirection and Memory Protection</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/Vector-Redirection-and-Memory-Protection/m-p/136510#M4371</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;SPAN&gt;Hi to all, i'm having trouble, what i want to do is to redirect the vector table after i protect the memory... i've read the datasheet but i'm kinda lost with the code, do you have an example code that does that?? i will really appreciate it, also what i want to do is once i redirect the vector table i want to change the direction where the interrupts go, for example i want to have 2 interrupt functions that catch the "old" vector (before i redirect it) and one interrupt function that catch the new vector (once i redirected it) but i'm really newbie at this hobbie and i've never catched an interrupt before... so i really need help with this one... Like i said before i do have experience with c/c++ but not with this kind of coding which i find really interesting...&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thank you a lot guys, so far, i've learned a lot in this forum!&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 14 Nov 2006 08:06:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/Vector-Redirection-and-Memory-Protection/m-p/136510#M4371</guid>
      <dc:creator>Saga</dc:creator>
      <dc:date>2006-11-14T08:06:34Z</dc:date>
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      <title>Re: Vector Redirection and Memory Protection</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/Vector-Redirection-and-Memory-Protection/m-p/136511#M4372</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Vector redirection is, &lt;STRONG&gt;unfortunately&lt;/STRONG&gt;, not implemented as one would normally assume.&amp;nbsp; You can't have two sets of vectors, only one.&amp;nbsp; The reset vector is always in the protected (old) code, and all other vectors are in the unprotected (new) code.&amp;nbsp; This has been a compaint of mine all along.&amp;nbsp; Whoever designed this vector redirection method hadn't have enough sleep the night before.&amp;nbsp; S/he assumed that one would be interested in only a *single* version of the code, the unprotected (new) one.&amp;nbsp; The protected (old) code would be doomed to work without interrupts, and thus&amp;nbsp;be limited to very basic functions of little complexity.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;To achieve what you describe, you have to do it "manually," i.e., forget hardware vector redirection, and use software redirection that you can switch on/off yourself.&amp;nbsp; This means, adding JMPs to original vectors after checking (via a flag someplace) which vector to execute.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Hardware vector redirection would have been a lot more useful had it been dynamic, i.e., a single write-once bit in some control register is one solution.&amp;nbsp; &lt;U&gt;The better solution would be for this switch to occur once the PC register is first loaded with any address in the unprotected region (indicating we have left the protected region).&lt;/U&gt;&amp;nbsp; This would have allowed for two fully working sets of code to co-exist, and true redirection.&lt;/DIV&gt;&lt;P&gt;Message Edited by tonyp on &lt;SPAN class="date_text"&gt;2006-11-14&lt;/SPAN&gt;&lt;SPAN class="time_text"&gt;09:56 AM&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 14 Nov 2006 15:46:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/Vector-Redirection-and-Memory-Protection/m-p/136511#M4372</guid>
      <dc:creator>tonyp</dc:creator>
      <dc:date>2006-11-14T15:46:22Z</dc:date>
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    <item>
      <title>Re: Vector Redirection and Memory Protection</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/Vector-Redirection-and-Memory-Protection/m-p/136512#M4373</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;Thank you tonyp... Yes, it is like that... but, strangely, the actual implementation of vector redirection fills my needs... &lt;IMG alt=":smileyhappy:" class="emoticon emoticon-smileyhappy" id="smileyhappy" src="http://freescale.i.lithium.com/i/smilies/16x16_smiley-happy.gif" title="Smiley Happy" /&gt;&lt;BR /&gt;&lt;BR /&gt;What i just want is just like once i protect the code a timer interrupt goes to another function for example:&lt;BR /&gt;&lt;BR /&gt;interrupt 25 void old_timer_interrupt ();&lt;BR /&gt;interrupt 25 void new_timer_interrupt ();&lt;BR /&gt;&lt;BR /&gt;What i want to do is once i protect the code and i redirect the vectors, the same timer interrupt goes to the new_timer_interrupt(); instead of the old_timer_interrupt();... In theory i know how to do that... I have to change the new vector interrupt to go to the new function but i do not know how to do this in the practice... Also i have to put in the PRM something like this&lt;BR /&gt;&lt;BR /&gt;VECTOR 25 old_timer_interrupt&lt;BR /&gt;&lt;BR /&gt;but do i have to put VECTOR 25 new_timer_interrupt ?? or how do i tell them that once that i protect some memory and redirect the vectors to go to the new_timer_interrupt() ?? thats my question... I hope some of you guys could give me an example code about that... it will be really appreciated. Thanks for reading!&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 14 Nov 2006 23:22:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/Vector-Redirection-and-Memory-Protection/m-p/136512#M4373</guid>
      <dc:creator>Saga</dc:creator>
      <dc:date>2006-11-14T23:22:15Z</dc:date>
    </item>
    <item>
      <title>Re: Vector Redirection and Memory Protection</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/Vector-Redirection-and-Memory-Protection/m-p/136513#M4374</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Can't help you with your compiler, but this may also be a function of the bootloader, and you may not have to do anything in your code (other than enable vector redirection).&amp;nbsp; My bootloader, for example, automatically redirects vectors to their new location during loading, so that vector at $FFFA ends up at $xFFA where x is based on whatever redirection the bootloader has enabled (to protect itself).&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Someone else will hopefully provide you with compiler specific instructions, if appropriate.&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Nov 2006 01:35:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/Vector-Redirection-and-Memory-Protection/m-p/136513#M4374</guid>
      <dc:creator>tonyp</dc:creator>
      <dc:date>2006-11-15T01:35:43Z</dc:date>
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    <item>
      <title>Re: Vector Redirection and Memory Protection</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/Vector-Redirection-and-Memory-Protection/m-p/136514#M4375</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;I hope so &lt;IMG alt=":smileytongue:" class="emoticon emoticon-smileytongue" id="smileytongue" src="http://freescale.i.lithium.com/i/smilies/16x16_smiley-tongue.gif" title="Smiley Tongue" /&gt;&lt;BR /&gt;&lt;BR /&gt;I appreciate your help too... I'm figuring it out myself though if i find the way ill post it in the forum... i'm pretty sure it will help another's too.&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Nov 2006 02:08:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/Vector-Redirection-and-Memory-Protection/m-p/136514#M4375</guid>
      <dc:creator>Saga</dc:creator>
      <dc:date>2006-11-15T02:08:37Z</dc:date>
    </item>
    <item>
      <title>Re: Vector Redirection and Memory Protection</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/Vector-Redirection-and-Memory-Protection/m-p/136515#M4376</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Hi Saga,&lt;/DIV&gt;&lt;DIV&gt;If you are using 9S08 (GB, QG, AW), vectors redirection functionnality is "included" into the chip (bit FNORED in NOVPT register).&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Regards,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 16 Nov 2006 06:25:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/Vector-Redirection-and-Memory-Protection/m-p/136515#M4376</guid>
      <dc:creator>yb</dc:creator>
      <dc:date>2006-11-16T06:25:02Z</dc:date>
    </item>
    <item>
      <title>Re: Vector Redirection and Memory Protection</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/Vector-Redirection-and-Memory-Protection/m-p/136516#M4377</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;vector redirection and security may conflict, get the redirection working before security.&lt;BR /&gt;&lt;BR /&gt;on a secure part (m0xFFBF=0xFC) consider using the security back door function when you move the vector table in flash. i just posted my effort on a mc9s08rd32dwe processor. things that i got confusted:&lt;BR /&gt;1)the lo level code to do the backdoor needs to emulate out of ram. write it in assembly language to avoid certain bad instructions. it will take about 50bytes of instruction, put this in a c language array and have the linker write it at processor power up to ram auto magic. refrence my posting.&lt;BR /&gt;2)0xFFBF = 0xFC for security set, 0xFE for security off&lt;BR /&gt;3)create a c language const array to assert flash 0xFFB0 through 0xFFBF to your settings, this includes the super secret 8byte code to operate the backdoor.&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 23 Nov 2006 04:36:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/Vector-Redirection-and-Memory-Protection/m-p/136516#M4377</guid>
      <dc:creator>jah</dc:creator>
      <dc:date>2006-11-23T04:36:45Z</dc:date>
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      <title>Re: Vector Redirection and Memory Protection</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/Vector-Redirection-and-Memory-Protection/m-p/136517#M4378</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;hi All&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I use mc9s08ac96 but not find bit FNORED in NOVPT register. This is used "&lt;FONT face="Arial" size="1"&gt;&lt;FONT face="Arial" size="1"&gt;KEYEN"&lt;/FONT&gt;&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="Arial" size="1"&gt;&lt;FONT face="Arial" size="1"&gt;on mc9s08ac32 this bit exist.&lt;/FONT&gt;&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="Arial" size="1"&gt;&lt;FONT face="Arial" size="1"&gt;&lt;/FONT&gt;&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT size="1"&gt;Alternative fo redirect Vectors ?&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT size="1"&gt;&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="Arial" size="1"&gt;&lt;FONT face="Arial" size="1"&gt;Ciao&lt;/FONT&gt;&lt;/FONT&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 31 Aug 2010 17:05:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/Vector-Redirection-and-Memory-Protection/m-p/136517#M4378</guid>
      <dc:creator>mBeppe</dc:creator>
      <dc:date>2010-08-31T17:05:37Z</dc:date>
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    <item>
      <title>Re: Vector Redirection and Memory Protection</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/Vector-Redirection-and-Memory-Protection/m-p/136518#M4379</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;It seems that all MMU enabled variants do NOT have vector redirection capability in hardware.&amp;nbsp; This may have something to do with the presence of a page window which would make the redirected vectors occasionally land inside a page, a big NO-NO.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;So, the software alternative is to do this for each vector you want to redirect:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;PRE&gt;ISR_Routine         ...                    rtiSoftVector          dw        ISR_Routine                    ...Redirect_1          lda       SoftVector+1        ;LSB of ISR address                    psha                    lda       SoftVector          ;MSB of ISR address                    psha                    RTS                           ;Call ISRHardVector_1        dw        Redirect_1&lt;/PRE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 31 Aug 2010 18:29:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/Vector-Redirection-and-Memory-Protection/m-p/136518#M4379</guid>
      <dc:creator>tonyp</dc:creator>
      <dc:date>2010-08-31T18:29:50Z</dc:date>
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      <title>Re: Vector Redirection and Memory Protection</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/Vector-Redirection-and-Memory-Protection/m-p/136519#M4380</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello TonyP,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;What would be the disadvantage of using a simple jump to the re-directed ISR routine?&amp;nbsp; Alternatively, the routine call could use JSR (with the ISR_Routine ending with RTS, rather than RTI).&amp;nbsp; These possibilities&amp;nbsp;would seem more straight forward - perhaps something like the following code&amp;nbsp;for the jump case.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;PRE&gt;ISR_Routine         ...                    rtiRedirect_1          jmp    ISR_RoutineHardVector_1        dc.w   Redirect_1

&lt;/PRE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;For C coding, maybe the following:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;PRE&gt;void ISR_func( void){   ...}interrupt Interrupt_number Redirect_1( void){   __asm jsr ISR_func;}&lt;/PRE&gt;&lt;P&gt;&amp;nbsp;The various Redirect functions would need to be placed at&amp;nbsp;predetermined positions known in advance to the entry code.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Mac&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 01 Sep 2010 07:53:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/Vector-Redirection-and-Memory-Protection/m-p/136519#M4380</guid>
      <dc:creator>bigmac</dc:creator>
      <dc:date>2010-09-01T07:53:25Z</dc:date>
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      <title>Re: Vector Redirection and Memory Protection</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/Vector-Redirection-and-Memory-Protection/m-p/136520#M4381</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;BLOCKQUOTE&gt;&lt;HR /&gt;bigmac wrote:&lt;BR /&gt;&lt;P&gt;Hello TonyP,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;What would be the disadvantage of using a simple jump to the re-directed ISR routine?&lt;/P&gt;&lt;P&gt;...&lt;/P&gt;&lt;P&gt;The various Redirect functions would need to be placed at&amp;nbsp;predetermined positions known in advance to the entry code.&lt;/P&gt;&lt;HR /&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;I think you answered it yourself: Having the ISRs at fixed locations.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Firmware upgrades would be unnecessarily more difficult to organize so that any improved / modified ISRs with a new size would fall on the exact same location(s).&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;An alternative would be to use an indirect JMP (a JMP to a table of JMPs), but the table entries would require 3 bytes, so you can't simply relocate the original hardware vectors by adding (subtracting) an offset.&amp;nbsp; Why not keep things simpler?&amp;nbsp; (It more closely resembles the hardware redirection.)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 01 Sep 2010 14:42:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/Vector-Redirection-and-Memory-Protection/m-p/136520#M4381</guid>
      <dc:creator>tonyp</dc:creator>
      <dc:date>2010-09-01T14:42:17Z</dc:date>
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      <title>Re: Vector Redirection and Memory Protection</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/Vector-Redirection-and-Memory-Protection/m-p/136521#M4382</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello TonyP,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;There seems to be a significant misinterpretation of&amp;nbsp;my previously posted suggestion.&amp;nbsp; There is no requirement for the ISR functions, designated by ISR_func() or ISR_Routine, to be placed at fixed locations.&amp;nbsp; I did not say this.&amp;nbsp; The position of each&amp;nbsp;ISR function need only be known to the application program, and not the boot loader.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;In your case, the SoftVector table would be located within the application area, and the position of each table entry would need to be known in advance by the boot loader code.&amp;nbsp; However, your code has the additional Redirect routines within the boot loader area, that are referenced by the normal interrupt vectors.&amp;nbsp; A consequence of this approach is that similar routines must be included for &lt;U&gt;every&lt;/U&gt; interrupt vector, since the boot loader does not know in advance which interrupts would be required by the application.&amp;nbsp; This would&amp;nbsp;result in&amp;nbsp;an increase in bootloader code size by maybe&amp;nbsp;up to 280 bytes.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;For the alternative approach, the Redirect routines would each occupy three bytes (or four bytes should a JSR instruction be used), and these routines&amp;nbsp;would be located in a jump table within the application area.&amp;nbsp; This table would&amp;nbsp;at a known location, usually immediately below the boot loader code - a very similar scenario to your SoftVector table.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The primary difference between the two approaches is that all interrupts, that do not require interception by the boot loader, may vector directly to the jump table within the application area, resulting in simplification of the boot loader code, and reduced code size.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The trade off would therefore appear to be either a slightly more complex jump table structure, versus an increase in the boot loader code size.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Mac&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 03 Sep 2010 00:41:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/Vector-Redirection-and-Memory-Protection/m-p/136521#M4382</guid>
      <dc:creator>bigmac</dc:creator>
      <dc:date>2010-09-03T00:41:48Z</dc:date>
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