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    <title>8-bit MicrocontrollersのトピックSCI Data register problem</title>
    <link>https://community.nxp.com/t5/8-bit-Microcontrollers/SCI-Data-register-problem/m-p/136216#M4263</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;SPAN&gt;Hey all:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; I am having a problem with the SCI Data register. I am sending bytes (via hyperterminal, hercules, and/or a self made app) through a RS232 cable to the board. The board (specifically SCI data reg [SCID]) receives all bytes properally....except... when I send 0x00 the SCID magically reads 0x80. And then occasionally when I send an opcode 0xD0 I get 0xC7 (about 30% of the time). These values are read from the SCID register itself immediately after sent (or last byte cleared).&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I was wondering what might cause this problem and/or how to fix it.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks in advance!&lt;/SPAN&gt;&lt;BR /&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 08 Jun 2007 02:33:09 GMT</pubDate>
    <dc:creator>Tacky</dc:creator>
    <dc:date>2007-06-08T02:33:09Z</dc:date>
    <item>
      <title>SCI Data register problem</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/SCI-Data-register-problem/m-p/136216#M4263</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;SPAN&gt;Hey all:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; I am having a problem with the SCI Data register. I am sending bytes (via hyperterminal, hercules, and/or a self made app) through a RS232 cable to the board. The board (specifically SCI data reg [SCID]) receives all bytes properally....except... when I send 0x00 the SCID magically reads 0x80. And then occasionally when I send an opcode 0xD0 I get 0xC7 (about 30% of the time). These values are read from the SCID register itself immediately after sent (or last byte cleared).&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I was wondering what might cause this problem and/or how to fix it.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks in advance!&lt;/SPAN&gt;&lt;BR /&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 08 Jun 2007 02:33:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/SCI-Data-register-problem/m-p/136216#M4263</guid>
      <dc:creator>Tacky</dc:creator>
      <dc:date>2007-06-08T02:33:09Z</dc:date>
    </item>
    <item>
      <title>Re: SCI Data register problem</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/SCI-Data-register-problem/m-p/136217#M4264</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Hi Tacky,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;It looks like a problem of baudrate mis-match.&lt;/DIV&gt;&lt;DIV&gt;Are you running on an internal clock?&lt;/DIV&gt;&lt;DIV&gt;Are you trimming it properly?&lt;/DIV&gt;&lt;DIV&gt;Is your code checking for framing errors? Are you getting any? (framing errors!)&lt;/DIV&gt;&lt;DIV&gt;What MPU are you using?&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Using a SCI with a baudrate mismatch will function better when MSB is clear (as long as some bits are set).&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 08 Jun 2007 06:06:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/SCI-Data-register-problem/m-p/136217#M4264</guid>
      <dc:creator>peg</dc:creator>
      <dc:date>2007-06-08T06:06:07Z</dc:date>
    </item>
    <item>
      <title>Re: SCI Data register problem</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/SCI-Data-register-problem/m-p/136218#M4265</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;Peg:&lt;BR /&gt;&lt;BR /&gt;Thanks for the reply&lt;BR /&gt;&lt;BR /&gt;That's what I thought initially at first was a BR problem. But then I thought why would I receive all my other bytes correctly and ONLY 0x00 fails to 0x80 (with exception of 0xd0 to 0xc7. But I checked the bytes surroudning the 0xd0 and there is no possible way to create a 0xc7 with timing errors)&lt;BR /&gt;&lt;BR /&gt;Either way, I rechecked my BR's and they all appear to be correct&lt;BR /&gt;for 9600 Baud on a 20 MHz Bus clock&amp;nbsp; SCIBD = Bus/(16*BR)&amp;nbsp;&amp;nbsp;&amp;nbsp; SCIBD = 9600&lt;BR /&gt;SCI1BDL = 0x82&lt;BR /&gt;Bus clock is actually 18.87 MHz, Maybe I should make this value closer? I get 0x7A&lt;BR /&gt;&lt;BR /&gt;I am using internal clock&lt;BR /&gt;I'm not trimming at all? Not sure what it does or if I even need it?&lt;BR /&gt;No framing errors&lt;BR /&gt;MPU = (for now) M68DEMO908GB60 Demo board&lt;BR /&gt;but will be likely MC9S08GB60 or the GT60 when I'm done debugging&lt;BR /&gt;&lt;BR /&gt;Thanks&lt;BR /&gt;&lt;BR /&gt;**********EDIT************&lt;BR /&gt;How does the GB60 board expect SCI packets to be sent? Is it expecting a parity? How many stop bits?&lt;BR /&gt;&lt;BR /&gt;Maybe there is a conflict with what the board expects from SCI and what I'm actually sending. If I only knew what the board wanted...&lt;BR /&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;BR /&gt;Message Edited by Tacky on &lt;SPAN class="date_text"&gt;2007-06-08&lt;/SPAN&gt; &lt;SPAN class="time_text"&gt;02:49 PM&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;Message Edited by Tacky on &lt;SPAN class="date_text"&gt;2007-06-08&lt;/SPAN&gt; &lt;SPAN class="time_text"&gt;02:50 PM&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;Message Edited by Tacky on &lt;SPAN class="date_text"&gt;2007-06-08&lt;/SPAN&gt; &lt;SPAN class="time_text"&gt;02:52 PM&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;Message Edited by Tacky on &lt;SPAN class="date_text"&gt;2007-06-08&lt;/SPAN&gt; &lt;SPAN class="time_text"&gt;02:57 PM&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 08 Jun 2007 20:28:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/SCI-Data-register-problem/m-p/136218#M4265</guid>
      <dc:creator>Tacky</dc:creator>
      <dc:date>2007-06-08T20:28:45Z</dc:date>
    </item>
    <item>
      <title>Re: SCI Data register problem</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/SCI-Data-register-problem/m-p/136219#M4266</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;AHA!&lt;BR /&gt;&lt;BR /&gt;Thanks peg&lt;BR /&gt;&lt;BR /&gt;I adjusted the baud for the newly calculated ICG (18.8728 MHz) instead of going off 20 MHz&lt;BR /&gt;and this seems to have fixed the problem!&lt;BR /&gt;&lt;BR /&gt;Much thanks!&lt;BR /&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 08 Jun 2007 21:29:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/SCI-Data-register-problem/m-p/136219#M4266</guid>
      <dc:creator>Tacky</dc:creator>
      <dc:date>2007-06-08T21:29:44Z</dc:date>
    </item>
    <item>
      <title>Re: SCI Data register problem</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/SCI-Data-register-problem/m-p/136220#M4267</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Hi Tacky,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Unless you are lucky and get a MPU on your demo board with a internal reference that is very close to what it should be then you need to trim it for reliable SCI comms.&lt;/DIV&gt;&lt;DIV&gt;The internal reference varies in frequency from device to device.&lt;/DIV&gt;&lt;DIV&gt;Look at the manual under ICG or search this forum for TRIM perhaps.&lt;/DIV&gt;&lt;DIV&gt;If you changed the ICG setup to get it to work then perhaps you now have a theoretical baudrate which is now slightly faster than desired and before you had slightly slower (or the other way around) and now the error in the internal clock is now correcting rather than making the error worse. And that is why it works now, however you should not rely on this.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;How about you tell us your ICG and SCI configuration values, before and now.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 09 Jun 2007 15:47:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/SCI-Data-register-problem/m-p/136220#M4267</guid>
      <dc:creator>peg</dc:creator>
      <dc:date>2007-06-09T15:47:07Z</dc:date>
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