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    <title>topic Re: 908AP32A COP enable in 8-bit Microcontrollers</title>
    <link>https://community.nxp.com/t5/8-bit-Microcontrollers/908AP32A-COP-enable/m-p/134654#M3775</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;Yes, both the CONFIG1 and CONFIG2 registers are write-once. From the data sheet:&lt;BR /&gt;&lt;BR /&gt;"NOTE&lt;BR /&gt;The CONFIG registers are not in the FLASH memory but are special&lt;BR /&gt;registers containing one-time writable latches after each reset."&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 05 May 2006 02:12:47 GMT</pubDate>
    <dc:creator>rocco</dc:creator>
    <dc:date>2006-05-05T02:12:47Z</dc:date>
    <item>
      <title>908AP32A COP enable</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/908AP32A-COP-enable/m-p/134653#M3774</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN style="font-size: 2;"&gt;I'm using the 908AP32A. The WD or COP is enabled by setting&amp;nbsp;the COPD bit&amp;nbsp;in config1 to zero (power-on reset state). On a prior design using the HC05 processor this was a write once registor. On the 908AP32A this is not indicated as such, meaning if I have a power surge this bit could toggle to a logic "1" disabling the WD. This appears to be whats happening in a test stress condition. Is this true? I am not writting to this registor, I'm using the power-on state. Is this registor really a write-once (as it should be)? Should I write a zero to this registor? Or is there something that I'm missing?&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN style="font-size: 2;"&gt;Any help would be greatly appreciated.&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 05 May 2006 00:01:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/908AP32A-COP-enable/m-p/134653#M3774</guid>
      <dc:creator>byteybird9</dc:creator>
      <dc:date>2006-05-05T00:01:41Z</dc:date>
    </item>
    <item>
      <title>Re: 908AP32A COP enable</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/908AP32A-COP-enable/m-p/134654#M3775</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;Yes, both the CONFIG1 and CONFIG2 registers are write-once. From the data sheet:&lt;BR /&gt;&lt;BR /&gt;"NOTE&lt;BR /&gt;The CONFIG registers are not in the FLASH memory but are special&lt;BR /&gt;registers containing one-time writable latches after each reset."&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 05 May 2006 02:12:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/908AP32A-COP-enable/m-p/134654#M3775</guid>
      <dc:creator>rocco</dc:creator>
      <dc:date>2006-05-05T02:12:47Z</dc:date>
    </item>
    <item>
      <title>Re: 908AP32A COP enable</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/908AP32A-COP-enable/m-p/134655#M3776</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Thanks.&amp;nbsp; I justed relooked at the document, section 3.1.&amp;nbsp; I also checked&amp;nbsp;my code and I'm setting CONFIG1 = 0 on the first statement in main().&amp;nbsp; Looks like something else is causing the lockup.&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Another solution is to have an external watchdog monitor assert a reset if an I/O pin on the HC08 does not toggle at least once per second.&amp;nbsp; A problem with this is that during the P&amp;amp;E programming the external WD would force a reset.&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 05 May 2006 04:41:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/908AP32A-COP-enable/m-p/134655#M3776</guid>
      <dc:creator>byteybird9</dc:creator>
      <dc:date>2006-05-05T04:41:56Z</dc:date>
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