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    <title>topic Re: About  MCF51AC256  memory in 8-bit Microcontrollers</title>
    <link>https://community.nxp.com/t5/8-bit-Microcontrollers/About-MCF51AC256-memory/m-p/758704#M22541</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt;tks, but&amp;nbsp; it not help to me.&amp;nbsp; &lt;SPAN&gt;Let me ask the other point of view&lt;/SPAN&gt;&amp;nbsp;,&lt;/DIV&gt;&lt;DIV&gt;for example , I use BDM Command&amp;nbsp; Read_MEM.sz(adrress is 24bit), it can read&amp;nbsp;FALSH and RAM, but how to read&amp;nbsp; Slave Peripherals(0x(ff)ff8000 to 0x(ff)ffffff)? it is 32bit adrress.&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/546i9CA3A46CA6328C5E/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/DIV&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 19 Jan 2018 07:34:36 GMT</pubDate>
    <dc:creator>lunke029</dc:creator>
    <dc:date>2018-01-19T07:34:36Z</dc:date>
    <item>
      <title>About  MCF51AC256  memory</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/About-MCF51AC256-memory/m-p/758702#M22539</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&amp;nbsp; MCF51AC256&amp;nbsp; memory&amp;nbsp; address is&amp;nbsp; 24bits,&amp;nbsp; Why&amp;nbsp; b&lt;SPAN&gt;elow&lt;/SPAN&gt;&amp;nbsp; pictrue is 32bits,&amp;nbsp; &lt;SPAN&gt;What does High 8bits&amp;nbsp; mean&lt;/SPAN&gt;&amp;nbsp;?&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="UDLLI[4ABRXILQQ8F{54JX9.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/35527i794574C496F7F32E/image-size/large?v=v2&amp;amp;px=999" role="button" title="UDLLI[4ABRXILQQ8F{54JX9.png" alt="UDLLI[4ABRXILQQ8F{54JX9.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 03 Jan 2018 04:13:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/About-MCF51AC256-memory/m-p/758702#M22539</guid>
      <dc:creator>lunke029</dc:creator>
      <dc:date>2018-01-03T04:13:00Z</dc:date>
    </item>
    <item>
      <title>Re: About  MCF51AC256  memory</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/About-MCF51AC256-memory/m-p/758703#M22540</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;First, the CF V1 device data bus is 32-bit. After the processor is granted the bus, it performs two longword read-bus cycles. The first longword at address 0x(00)00_0000 is loaded into the supervisor stack pointer and the second longword at address 0x(00)00_0004 is loaded into the program counter. After the initial instruction is fetched from memory, program execution begins at the address in the PC. ColdFire processors load hardware configuration information into the D0 and D1 general-purpose registers after system reset. The hardware configuration information is loaded immediately after the reset-in signal is negated. RAM and flash memory allocation is determined by respective linker files.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 15 Jan 2018 08:42:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/About-MCF51AC256-memory/m-p/758703#M22540</guid>
      <dc:creator>miduo</dc:creator>
      <dc:date>2018-01-15T08:42:42Z</dc:date>
    </item>
    <item>
      <title>Re: About  MCF51AC256  memory</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/About-MCF51AC256-memory/m-p/758704#M22541</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt;tks, but&amp;nbsp; it not help to me.&amp;nbsp; &lt;SPAN&gt;Let me ask the other point of view&lt;/SPAN&gt;&amp;nbsp;,&lt;/DIV&gt;&lt;DIV&gt;for example , I use BDM Command&amp;nbsp; Read_MEM.sz(adrress is 24bit), it can read&amp;nbsp;FALSH and RAM, but how to read&amp;nbsp; Slave Peripherals(0x(ff)ff8000 to 0x(ff)ffffff)? it is 32bit adrress.&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/546i9CA3A46CA6328C5E/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/DIV&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 19 Jan 2018 07:34:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/About-MCF51AC256-memory/m-p/758704#M22541</guid>
      <dc:creator>lunke029</dc:creator>
      <dc:date>2018-01-19T07:34:36Z</dc:date>
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