TPM3 Pulse generation in MC9S08AC60 - minimum pulse width issue

mfugere — Tue, 29 Nov 2016 16:38:05 GMT

I am trying to create single pulse output of between 100nanosec - 200nanosec width, at a fairly precisely timed 62 microsecond interval as part of porting a product code from the now obsolete MC908GP32 with older generation Timer module. In the original MC908GP32 code, setting a target value of "0" width would still cause a 1-clock wide pulse to occur at the Timer modulo rollover. So, running the bus clock at 7.34MHz with a Timer modulo setting of 430 could produce approximately 130-150nsec wide pulse at about 62microsecond intervals.

After making code changes to account for TPMV3 in the AC60, I end up with setting the match value = MODULO-1 for the individual Timer channel so that the pulse should only be 1 clock before modulo reset. I find that the pulse width is 240 nanoseconds when running at the same 7.34MHz bus clock rate for TPM clock source. 240nanoseconds is at least 40 ns too wide, so I increase the bus clock rate to 8.4MHz to see if it will help. Leaving the modulo count values the same, I observe that the overall period is shortened by the expected 13.5% from the 7.34MHz clock rate, but the pulse width remains at 240 nanoseconds.

I *must* have a pulse width of at least 100 ns and no more than 200 ns. Is there another way I can use the timers to implement this which can produced narrower pulses, or is the minimum pulse width of the TPM V3 module approx 240 nanoseconds?

            TPM1SC = 0x00;       // Stop Main Timer1
           TPM1MODH = 0x01; // Modulo 430 counts
           TPM1MODL = 0xCC;
           TPM1C4VH = 0x01; // Match value at 429 counts
           TPM1C4VL = 0xCB;

           TPM1C4SC = (unsigned char)(TPMXCNSC_CHNMSNB|TPMXCNSC_CHNELSNA); // Configure pulse output
           TPM1SC = (TPMXSC_CLKSA); // Start Timer
       do
        {          // Wait for rollover to proceed to next step
           d = TPM1SC;
       } while(((volatile)d & TPMXCNSC_CHNF) != TPMXCNSC_CHNF );

{Edit} As another experiment, I increased the ICG Clock rate to 18.886MHz (BusClock=9.4MHz) and I did observe some improvement in the pulse width -- it reduced down to approximately 213nsecs, so it appears to be approximately 2 clock cycles wide (TBusclk = 105.9nsecs) - if this is likely the best that it can do, I may have to do some more changes to the code and application.

8-bit MicrocontrollersのトピックTPM3 Pulse generation in MC9S08AC60 - minimum pulse width issue

TPM3 Pulse generation in MC9S08AC60 - minimum pulse width issue