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    <title>topic SH8 or QG8 CLOCK - FEE vs. FBE vs. FBELP in 8-bit Microcontrollers</title>
    <link>https://community.nxp.com/t5/8-bit-Microcontrollers/SH8-or-QG8-CLOCK-FEE-vs-FBE-vs-FBELP/m-p/215598#M18714</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I've got an application that needs a reasonably fast, and very stable clock to measure the frequency of an&amp;nbsp;incoming square wave up to a few kHz.&lt;/P&gt;&lt;P&gt;I'm not getting a stable reading using the internal clock, so I dug up a couple of crystals: a 2MHZ and a 16MHz crystal and now I'm wondering how to make this work? Can I use the 16M?&lt;/P&gt;&lt;P&gt;The two ICS control registers are very confusing, can anybody explain any of this for me?&lt;/P&gt;&lt;P&gt;In particular: What does the High Gain option do? Do I need high or low frequency range?&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;It sounds like using anything but FBELP limits my external source to around 4.6MHz to keep a 36kHz FLL...&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Any help is appreciated, thanks!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 30 Jul 2010 02:17:56 GMT</pubDate>
    <dc:creator>z537z</dc:creator>
    <dc:date>2010-07-30T02:17:56Z</dc:date>
    <item>
      <title>SH8 or QG8 CLOCK - FEE vs. FBE vs. FBELP</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/SH8-or-QG8-CLOCK-FEE-vs-FBE-vs-FBELP/m-p/215598#M18714</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I've got an application that needs a reasonably fast, and very stable clock to measure the frequency of an&amp;nbsp;incoming square wave up to a few kHz.&lt;/P&gt;&lt;P&gt;I'm not getting a stable reading using the internal clock, so I dug up a couple of crystals: a 2MHZ and a 16MHz crystal and now I'm wondering how to make this work? Can I use the 16M?&lt;/P&gt;&lt;P&gt;The two ICS control registers are very confusing, can anybody explain any of this for me?&lt;/P&gt;&lt;P&gt;In particular: What does the High Gain option do? Do I need high or low frequency range?&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;It sounds like using anything but FBELP limits my external source to around 4.6MHz to keep a 36kHz FLL...&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Any help is appreciated, thanks!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 30 Jul 2010 02:17:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/SH8-or-QG8-CLOCK-FEE-vs-FBE-vs-FBELP/m-p/215598#M18714</guid>
      <dc:creator>z537z</dc:creator>
      <dc:date>2010-07-30T02:17:56Z</dc:date>
    </item>
    <item>
      <title>Re: SH8 or QG8 CLOCK - FEE vs. FBE vs. FBELP</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/SH8-or-QG8-CLOCK-FEE-vs-FBE-vs-FBELP/m-p/215599#M18715</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;For the 'SH8 device, the maximum crystal frequency allowed is 5 MHz for FEE and FBE modes, and 16 MHz for FBELP mode.&amp;nbsp; The reason that FBE mode has a lesser value&amp;nbsp;is that the FLL still requires to run in this mode, and this supplies the BDC clock for debug purposes.&amp;nbsp; For FBELP mode, the FLL does not run, so there is no BDC clock.available.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;For period measurement of an external signal, using&amp;nbsp;input capture for the&amp;nbsp;TPM module, there is a further issue that the bus clock will be subject to the normal FLL jitter&amp;nbsp;when using&amp;nbsp;FEE mode, and this may result in some uncertainty of the measurement when the TPM clock is supplied from the bus.&amp;nbsp; An alternative ICSFFCLK may be selected for the TPM module source, but this appears to be the divided down to 32 kHz external reference.&amp;nbsp; Some other devices are more flexible in that the non-divided external reference may be used for the TPM clock.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;It would therefore appear that you have the choice of FBE mode with a maximum bus frequency of 2.5 MHz, or FBELP mode with a maxumum bus frequency of 8 MHz, but no debug capability.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Mac&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 30 Jul 2010 12:43:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/SH8-or-QG8-CLOCK-FEE-vs-FBE-vs-FBELP/m-p/215599#M18715</guid>
      <dc:creator>bigmac</dc:creator>
      <dc:date>2010-07-30T12:43:43Z</dc:date>
    </item>
    <item>
      <title>Re: SH8 or QG8 CLOCK - FEE vs. FBE vs. FBELP</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/SH8-or-QG8-CLOCK-FEE-vs-FBE-vs-FBELP/m-p/215600#M18716</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks Mac, but I'm still a little confused as to the whole operation of this thing:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;1. I tried just running a simple program using the internal clock,&lt;/P&gt;&lt;P&gt;CLKS = 01&lt;/P&gt;&lt;P&gt;IREFS = 1&lt;/P&gt;&lt;P&gt;BDIV = 00&lt;/P&gt;&lt;P&gt;And toggling an output port every 50 cycles.&lt;/P&gt;&lt;P&gt;It comes out as a crazy low frequency (like 6Hz).&lt;/P&gt;&lt;P&gt;Change CLKS to 00 and my output is in the 3-3.5kHz area, but that still doesn't make any sense to me.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;2. Using the same program, I can't get the 2MHz crystal to work at all, the output stays the same when I pull the chip out, put it back in, reset, etc.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I've read your post &lt;A href="https://community.freescale.com/message/58177#58177" title="https://community.freescale.com/message/58177#58177"&gt;https://community.freescale.com/message/58177#58177&lt;/A&gt;regarding maximum usable bus frequency, and I think I can get by with a 2-4MHz bus clock, but currently I seem to be a few orders of magnitude lower than that.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Clock jitter is the primary issue here, I just want a stable source to work with.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;How would I set up my registers for either of these options?&lt;/P&gt;&lt;P&gt;I'm done debugging and don't need the BDM at this point...&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks again&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 31 Jul 2010 00:27:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/SH8-or-QG8-CLOCK-FEE-vs-FBE-vs-FBELP/m-p/215600#M18716</guid>
      <dc:creator>z537z</dc:creator>
      <dc:date>2010-07-31T00:27:16Z</dc:date>
    </item>
    <item>
      <title>Re: SH8 or QG8 CLOCK - FEE vs. FBE vs. FBELP</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/SH8-or-QG8-CLOCK-FEE-vs-FBE-vs-FBELP/m-p/215601#M18717</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;BLOCKQUOTE&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;BLOCKQUOTE&gt;&lt;HR /&gt;z537z wrote:&lt;BR /&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;1. I tried just running a simple program using the internal clock,&lt;/P&gt;&lt;P&gt;CLKS = 01&lt;/P&gt;&lt;P&gt;IREFS = 1&lt;/P&gt;&lt;P&gt;BDIV = 00&lt;/P&gt;&lt;P&gt;And toggling an output port every 50 cycles.&lt;/P&gt;&lt;P&gt;It comes out as a crazy low frequency (like 6Hz).&lt;/P&gt;&lt;P&gt;Change CLKS to 00 and my output is in the 3-3.5kHz area, but that still doesn't make any sense to me.&lt;/P&gt;&lt;HR /&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;By setting CLKS to 01, you are deriving the bus clock directly from the internal reference (FBI mode), i.e. a bus frequency of nominally 16 kHz.&amp;nbsp; Not what you require.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;With a setting of 00, the bus clock is sourced from the FLL (FEI or FEE mode).&amp;nbsp; The setting IREFS = 1&amp;nbsp;gives FEI mode.&amp;nbsp; To use the setting BDIV = 00, the internal reference must have previously been trimmed, otherwise it is possible to exceed the maximum allowable bus frequency because of the wide initial tolerance for the internal reference..&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;To directly&amp;nbsp;source the external reference for FBE or FBELP mode, the CLKS setting should be 10.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;BLOCKQUOTE&gt;&lt;HR /&gt;z537z wrote:&lt;BR /&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;2. Using the same program, I can't get the 2MHz crystal to work at all, the output stays the same when I pull the chip out, put it back in, reset, etc.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;HR /&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;A possible reason here is that you may not be enabling for external crystal use, requiring use of two pins.&amp;nbsp; The alternative is for an external clock source input, requiring only a single pin.&amp;nbsp; For crystal usage, EREFS = 1.&amp;nbsp;&amp;nbsp; If the external reference does not oscillate, the use of the reset default FEI mode will continue.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The other relevant settings within ICSC2 register&amp;nbsp;that might be used:&lt;/P&gt;&lt;P&gt;RANGE = 1 for crystals in MHz range&lt;/P&gt;&lt;P&gt;HGO = 1 will ensure oscillation for crystals in MHz range&lt;/P&gt;&lt;P&gt;LP = 0 for FBE mode, or LP = 1 for FBELP mode&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;All bits for the ICSC2 register should be written simultaneously, since some bits are write once for some MCU types.&amp;nbsp; A 2 MHz crystal, for FBE mode, will give a bus frequency of 1 MHz.&amp;nbsp; You will need a 4 MHz crystal to achieve a 2 MHz bus.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Mac&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 31 Jul 2010 18:51:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/SH8-or-QG8-CLOCK-FEE-vs-FBE-vs-FBELP/m-p/215601#M18717</guid>
      <dc:creator>bigmac</dc:creator>
      <dc:date>2010-07-31T18:51:47Z</dc:date>
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    <item>
      <title>Re: SH8 or QG8 CLOCK - FEE vs. FBE vs. FBELP</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/SH8-or-QG8-CLOCK-FEE-vs-FBE-vs-FBELP/m-p/215602#M18718</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Mac - this all makes sense, and I'm thinking my reused crystal is shot (yes, I have the caps to ground on either side), thus the chip keeps defaulting to the internal ref.&lt;/P&gt;&lt;P&gt;SO going forward, here's my test program:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;PRE&gt;void main(void) {       //ICS setup  ICSC1 = 0b10111000; //Ext source, RDIV = 128 for 4.6MHz crystal, IREFS = 0  ICSC2 = 0b00110100; //BDIV = 1, Hi Range, Hi Gain, Oscillator requested       //PORT A setup  PTADD_PTADD3 = 1;     //output to toggle      for(;;) {    asm BSET 3, 0x00;  asm BCLR 3, 0x00;  } //for }//main\&lt;/PRE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks for the clarification on the register defs -&amp;nbsp; Nothing seems to fully&amp;nbsp;describe the gain, range, etc. in the manual.&lt;/P&gt;&lt;P&gt;I'll be picking a 4 or 4.6MHz crystal and this will allow for a 2 or 2.3MHz busclk. Which should be plenty to accurately measure a max 3kHz incoming signal for my final application.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks again&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 10 Aug 2010 01:28:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/SH8-or-QG8-CLOCK-FEE-vs-FBE-vs-FBELP/m-p/215602#M18718</guid>
      <dc:creator>z537z</dc:creator>
      <dc:date>2010-08-10T01:28:54Z</dc:date>
    </item>
    <item>
      <title>Re: SH8 or QG8 CLOCK - FEE vs. FBE vs. FBELP</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/SH8-or-QG8-CLOCK-FEE-vs-FBE-vs-FBELP/m-p/215603#M18719</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;BLOCKQUOTE&gt;&lt;HR /&gt;z537z wrote:&lt;BR /&gt;&lt;P&gt;Mac - this all makes sense, and I'm thinking my reused crystal is shot (yes, I have the caps to ground on either side), thus the chip keeps defaulting to the internal ref.&lt;/P&gt;&lt;HR /&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;More importantly, do you also&amp;nbsp;have a high value resistor (1Mohm to 4.7Mohm) between the two pins, to provide biassing for the oscillator?&amp;nbsp; The oscillator will not work without this component.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Mac&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 10 Aug 2010 06:23:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/SH8-or-QG8-CLOCK-FEE-vs-FBE-vs-FBELP/m-p/215603#M18719</guid>
      <dc:creator>bigmac</dc:creator>
      <dc:date>2010-08-10T06:23:36Z</dc:date>
    </item>
    <item>
      <title>Re: SH8 or QG8 CLOCK - FEE vs. FBE vs. FBELP</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/SH8-or-QG8-CLOCK-FEE-vs-FBE-vs-FBELP/m-p/215604#M18720</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Well THAT would certainly help.&lt;/P&gt;&lt;P&gt;Thanks for the duuuuhhhhhhhhhhh support &lt;IMG alt=":smileytongue:" class="emoticon emoticon-smileytongue" id="smileytongue" src="http://freescale.i.lithium.com/i/smilies/16x16_smiley-tongue.gif" title="Smiley Tongue" /&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Got it all working finally, thanks again for the assistance.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 11 Aug 2010 01:26:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/SH8-or-QG8-CLOCK-FEE-vs-FBE-vs-FBELP/m-p/215604#M18720</guid>
      <dc:creator>z537z</dc:creator>
      <dc:date>2010-08-11T01:26:48Z</dc:date>
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