topic Re: MC9S08DZ60 core test in 8-bit Microcontrollers https://community.nxp.com/t5/8-bit-Microcontrollers/MC9S08DZ60-core-test/m-p/210436#M18051 <HTML><HEAD></HEAD><BODY><P>Thank you very much, I will check the opcodes on the manual.</P><P>&nbsp;</P><P>Matteo</P></BODY></HTML> Fri, 02 Jul 2010 20:10:54 GMT italiandoh 2010-07-02T20:10:54Z MC9S08DZ60 core test https://community.nxp.com/t5/8-bit-Microcontrollers/MC9S08DZ60-core-test/m-p/210433#M18048 <HTML><HEAD></HEAD><BODY><P>Hello,</P><P>we are developing a diagnostic module for this processor in which we are testing all the core instructions. These tests are coded directly in assembly language in C functions using HIL. The problem is that the compiler optimizes some instructions by replacing them with others. For example:</P><P>&nbsp;</P><P>&nbsp; 449:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; cpuBHS:<BR />&nbsp; 450:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; ; BHS: Branch if Higher or Same<BR />&nbsp; 451:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; ; A = 0x55<BR />&nbsp; 452:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; cmp #0x56<BR />&nbsp; 007c a156&nbsp;&nbsp;&nbsp;&nbsp; [2]&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; CMP&nbsp;&nbsp; #86<BR />&nbsp; 453:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; bhs cpuEr&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; &nbsp;; Should never branch<BR />&nbsp; 007e 247f&nbsp;&nbsp;&nbsp;&nbsp; [3]&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; BCC&nbsp;&nbsp; LFF ;abs = 00ff<BR />&nbsp; 454:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; cmp #CORETESTCFG_LOGIC_VAL1<BR />&nbsp; 0080 a155&nbsp;&nbsp;&nbsp;&nbsp; [2]&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; CMP&nbsp;&nbsp; #85<BR />&nbsp; 455:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; bhs cpuBHS2&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; &nbsp;; Should branch<BR />&nbsp; 0082 2402&nbsp;&nbsp;&nbsp;&nbsp; [3]&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; BCC&nbsp;&nbsp; L86 ;abs = 0086<BR />&nbsp; 0084&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; L84:&nbsp;&nbsp; &nbsp;<BR />&nbsp; 456:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; bra cpuEr&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; &nbsp;; Go fail<BR />&nbsp; 0084 2079&nbsp;&nbsp;&nbsp;&nbsp; [3]&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; BRA&nbsp;&nbsp; LFF ;abs = 00ff<BR />&nbsp; 0086&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; L86:&nbsp;&nbsp; &nbsp;<BR />&nbsp; 457:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; cpuBHS2:<BR />&nbsp; 458:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; cmp #0x54<BR />&nbsp; 0086 a154&nbsp;&nbsp;&nbsp;&nbsp; [2]&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; CMP&nbsp;&nbsp; #84<BR />&nbsp; 459:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; bhs cpuBLE&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; &nbsp;; Should branch<BR />&nbsp; 0088 2402&nbsp;&nbsp;&nbsp;&nbsp; [3]&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; BCC&nbsp;&nbsp; L8C ;abs = 008c<BR />&nbsp; 008a&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; L8A:&nbsp;&nbsp; &nbsp;<BR />&nbsp; 460:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; bra cpuEr&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; &nbsp;; Go fail<BR />&nbsp; 008a 2073&nbsp;&nbsp;&nbsp;&nbsp; [3]&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; BRA&nbsp;&nbsp; LFF ;abs = 00ff<BR />&nbsp; 008c&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; L8C:&nbsp;&nbsp; &nbsp;<BR /><BR /></P><P>We want to test the BHS instruction but the compiler uses BCC instead. The only relevant compiler options that we use are -Onf and -OnB=b.</P><P>Is there a way to solve this problem ?</P><P>Thanks in advance for any help,</P><P>&nbsp;</P><P>Matteo</P></BODY></HTML> Fri, 02 Jul 2010 17:19:07 GMT https://community.nxp.com/t5/8-bit-Microcontrollers/MC9S08DZ60-core-test/m-p/210433#M18048 italiandoh 2010-07-02T17:19:07Z Re: MC9S08DZ60 core test https://community.nxp.com/t5/8-bit-Microcontrollers/MC9S08DZ60-core-test/m-p/210434#M18049 <HTML><HEAD></HEAD><BODY><P>Brash when higher or same and branch if carry is clear&nbsp;have identical opcodes, no optimization takes place.</P><P>&nbsp;</P><P>Not only BHS = BCC, but also BLO = BCS.</P></BODY></HTML> Fri, 02 Jul 2010 17:28:06 GMT https://community.nxp.com/t5/8-bit-Microcontrollers/MC9S08DZ60-core-test/m-p/210434#M18049 kef 2010-07-02T17:28:06Z Re: MC9S08DZ60 core test https://community.nxp.com/t5/8-bit-Microcontrollers/MC9S08DZ60-core-test/m-p/210435#M18050 <HTML><HEAD></HEAD><BODY><P>BCC is the same as BHS</P><P>BCS is the same as BLO</P><P>&nbsp;</P><P>You can check the actual opcodes in the manual.</P></BODY></HTML> Fri, 02 Jul 2010 17:29:33 GMT https://community.nxp.com/t5/8-bit-Microcontrollers/MC9S08DZ60-core-test/m-p/210435#M18050 tonyp 2010-07-02T17:29:33Z Re: MC9S08DZ60 core test https://community.nxp.com/t5/8-bit-Microcontrollers/MC9S08DZ60-core-test/m-p/210436#M18051 <HTML><HEAD></HEAD><BODY><P>Thank you very much, I will check the opcodes on the manual.</P><P>&nbsp;</P><P>Matteo</P></BODY></HTML> Fri, 02 Jul 2010 20:10:54 GMT https://community.nxp.com/t5/8-bit-Microcontrollers/MC9S08DZ60-core-test/m-p/210436#M18051 italiandoh 2010-07-02T20:10:54Z