8-bit MicrocontrollersのトピックRe: MC9S08GW64 - Baud rate question

MC9S08GW64 - Baud rate question

Richard777 — Wed, 13 Apr 2011 22:27:57 GMT

Hi guys, several years ago I had post a message about MC9S08AW32 baud rate and Xtal value.

https://community.freescale.com/message/25827#25827

Thanks to you I could solve my problem as follows:

xtal 3.6864 Mhz
internal bus frecuency 18.432 Mhz
SCI baud rate range in 4800-9600-19200-38400-57600-115200 with 0 % error

Now I'm trying to change the AW60 by the GW64, but the last manage in diferent mode the bus frecuency, I can't get at same time the desired baud rates and high frecuency bus ( above 12 Mhz ).

Could someone help me ?

Thanks !

Re: MC9S08GW64 - Baud rate question

Richard777 — Thu, 14 Apr 2011 08:35:31 GMT

I answer myself. The better options that I found:

xtal 32768
FLL mode = FEE
Internal bus clock = 19.922944 Mhz ( tcyc 50.19 ns )
SCI at 4800 ( 0.16 % )
SCI at 9600 ( 0.22 % )
SCI at 19200 ( 0.22 % )
SCI at 38400 ( 1.33 % )
SCI at 57600 ( 1.7 % )
SCI at 115200 ( 1.7 % )

If anyone find better results please let me know.

Best regards !

Re: MC9S08GW64 - Baud rate question

bigmac — Thu, 14 Apr 2011 15:33:11 GMT

Hello Richard,

You seem to have overlooked the fact that the 'GW64 device, when using one of the FLL engaged modes, has a maximum DCO output frequency of 20MHz, and therefore a maximum bus frequency of only 10MHz. Using a standard 32.768kHz crystal will produce a bus frequency of either 8.388608MHz or 9.961472MHz, depending on the DMX32 control bit setting.

Neither of these frequencies produce acceptable results for a data rate of 115200 baud.

To provide exact baud rates, you would need an ICS reference frequency of 36kHz, to give a bus frequency of 9.216MHz. You could use a low frequency crystal of 36.0kHz, or one of the following high frequency crystals - 1.152, 2.304, 4.608 or 9.216MHz. To my knowledge, none of these frequencies are "standard".

If you do not require a crystal controlled bus frequency for any other purpose, an alternative could be to use FEI mode, with the internal reference trimmed to 36.0 kHz. This would be of sufficient accuracy and stability for SCI use.

Regards,

Mac

Re: MC9S08GW64 - Baud rate question

Richard777 — Fri, 15 Apr 2011 01:49:07 GMT

Hi BigMac, thanks for your responce.

I'm really not an expert with the ICS ( internal clock source ) management. For the all my calculations I use the Proccess Expert included in the CodeWarrior last version. Working with xtal at 32768 Hz and bus frecuency at 19.922944 Mhz the Proccess Expert didn't show any warning or error.

Could you tell me where in the data sheet specified about DCO max output frecuency and related bus frecuency ?

Thank in advance !

Re: MC9S08GW64 - Baud rate question

peg — Fri, 15 Apr 2011 06:07:40 GMT

Hi Richard,

Page 27 Section 3.9 of the datasheet not the reference manual

Many a time the peculiarities of new devices are not properly allowed for in Processor Expert.

Re: MC9S08GW64 - Baud rate question

Richard777 — Fri, 15 Apr 2011 09:41:37 GMT

Hi Peg, thank for your fast responce. I'm reading the page 27 of the data sheet but I understand that this information related only to internal clock source that is not my case because I use external reference clock via xtal.

Sorry for the incovenience !

Regards

Re: MC9S08GW64 - Baud rate question

bigmac — Fri, 15 Apr 2011 20:47:49 GMT

Hello Richard,

The important parameter here is the trimmed DCO frequency range 16-20 MHz on page 27. The DCO is utilised for both FEI and FEE modes. The maximum bus frequency is the DCO frequency divided by two. When the ICS is setup for the wide reference frequency range (31.5 - 39.063 kHz), the DCO output will be 512 times the reference frequency. This means that the maximum bus frequency will be 256 times the reference frequency.

To achieve a bus frequency greater than 10MHz would require the use of FBE mode, using an external high frequency square wave clock source. With this mode, the bus is directly driven via the divide by 2 stage, and the DCO is not utilised.

If there is an apparent contrdiction between the datasheet and Processor Expert performance, perhaps you should submit a service request to have the matter clarified.

Regards,

Mac

Re: MC9S08GW64 - Baud rate question

Richard777 — Sun, 17 Apr 2011 03:06:38 GMT

Hi Mac and Peg.

I understood that the max value for DCO trimmed is 20 Mhz. But reading and reading a lot off data sheets I found a small difference between The ICS implemented in GW64 and the ICS implemented in another family members ( SH32, QE128 ). In these the bus frecuency clock is the ICSOUT frecuency divided by 2 but in the GW64 the bus frecuency clock is directly the ICSOUT frecuency ( please read reference manual page 34 System clock Distribution Diagram ). I think for this reason the PE didn't report warning or error when I select FEE mode and bus clock at 19.922944 Mhz.

Best regards !

Re: MC9S08GW64 - Baud rate question

bigmac — Thu, 21 Apr 2011 16:50:54 GMT

Hello Richard,

I take your point! I actually did check the Clock Distribution diagram, but missed that detail. This is quite a significant development for the HCS08. I wonder how many other recent devices are similar in this respect?

Regards,

Mac

Re: MC9S08GW64 - Baud rate question

Richard777 — Thu, 21 Apr 2011 22:44:01 GMT

Hi Mac, rigth now I'm migrating a device with the AW60 for the GW64. The main features that I rescued are:

4 serial port
4 Kb RAM
Independent real time clock

Best regards !