<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
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    <title>topic Re: SPI Clock problem in 8-bit Microcontrollers</title>
    <link>https://community.nxp.com/t5/8-bit-Microcontrollers/SPI-Clock-problem/m-p/197158#M15845</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;PEG;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;At the datasheet writes that&amp;nbsp;do not send second data before transmit buffer empty flag is set.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I wrote this codes:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;void sendSPI(byte adres, byte data1, byte data2){&lt;BR /&gt;&amp;nbsp; while (!SPIS_SPTEF);// check to see if SPI TX ready&lt;BR /&gt;&amp;nbsp; &amp;nbsp;SPIS;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;// clear status flags&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;&amp;nbsp; SPID = adres;&amp;nbsp;&amp;nbsp;&amp;nbsp;// load data into SPI register&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;&amp;nbsp; while (!SPIS_SPTEF);// check to see if SPI TX ready&lt;BR /&gt;&amp;nbsp; &amp;nbsp;SPIS;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;// clear status flags&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;&amp;nbsp; SPID = data1;&amp;nbsp;&amp;nbsp;&amp;nbsp;// load data into SPI register&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;&amp;nbsp; while (!SPIS_SPTEF);// check to see if SPI TX ready&lt;BR /&gt;&amp;nbsp; &amp;nbsp;SPIS;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;// clear status flags&lt;BR /&gt;&lt;BR /&gt;&amp;nbsp; SPID = data2;&amp;nbsp;&amp;nbsp;&amp;nbsp;// load data into SPI register&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&lt;BR /&gt;&amp;nbsp; while (!SPIS_SPRF);&amp;nbsp;// wait for receive full flag&lt;BR /&gt;&amp;nbsp; &amp;nbsp;SPID;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;// dummy read to clear flags&lt;BR /&gt;}&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;If u have any codes to implement your suggest i'll try and feedback again&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 08 Jul 2009 18:24:30 GMT</pubDate>
    <dc:creator>longliveboy</dc:creator>
    <dc:date>2009-07-08T18:24:30Z</dc:date>
    <item>
      <title>SPI Clock problem</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/SPI-Clock-problem/m-p/197155#M15842</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi everybody;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I'm using LL16 and try to sent data to a DAC via SPI.&lt;/P&gt;&lt;P&gt;The problem is LL16 generates SPI clock&amp;nbsp;only for&amp;nbsp;8bits but my hardware(DAC) needs 24bit continuos clock for successful data transfer. Is there any way to generate 24 bits clock with LL16&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks,&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 08 Jul 2009 17:40:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/SPI-Clock-problem/m-p/197155#M15842</guid>
      <dc:creator>longliveboy</dc:creator>
      <dc:date>2009-07-08T17:40:06Z</dc:date>
    </item>
    <item>
      <title>Re: SPI Clock problem</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/SPI-Clock-problem/m-p/197156#M15843</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;As its async can you just send three bytes one after the other?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 08 Jul 2009 17:53:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/SPI-Clock-problem/m-p/197156#M15843</guid>
      <dc:creator>CarlFST60L</dc:creator>
      <dc:date>2009-07-08T17:53:08Z</dc:date>
    </item>
    <item>
      <title>Re: SPI Clock problem</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/SPI-Clock-problem/m-p/197157#M15844</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi longliveboy,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;As the SPI data register is buffered, by keeping it fed, you can produce an infinitely long continous clock and data. Basically you can transfer into the buffer while the actual shift register is still shifting out. When the shifting is done the buffer will transfer into the shift register and you have continuous operation.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 08 Jul 2009 17:55:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/SPI-Clock-problem/m-p/197157#M15844</guid>
      <dc:creator>peg</dc:creator>
      <dc:date>2009-07-08T17:55:04Z</dc:date>
    </item>
    <item>
      <title>Re: SPI Clock problem</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/SPI-Clock-problem/m-p/197158#M15845</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;PEG;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;At the datasheet writes that&amp;nbsp;do not send second data before transmit buffer empty flag is set.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I wrote this codes:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;void sendSPI(byte adres, byte data1, byte data2){&lt;BR /&gt;&amp;nbsp; while (!SPIS_SPTEF);// check to see if SPI TX ready&lt;BR /&gt;&amp;nbsp; &amp;nbsp;SPIS;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;// clear status flags&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;&amp;nbsp; SPID = adres;&amp;nbsp;&amp;nbsp;&amp;nbsp;// load data into SPI register&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;&amp;nbsp; while (!SPIS_SPTEF);// check to see if SPI TX ready&lt;BR /&gt;&amp;nbsp; &amp;nbsp;SPIS;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;// clear status flags&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;&amp;nbsp; SPID = data1;&amp;nbsp;&amp;nbsp;&amp;nbsp;// load data into SPI register&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;&amp;nbsp; while (!SPIS_SPTEF);// check to see if SPI TX ready&lt;BR /&gt;&amp;nbsp; &amp;nbsp;SPIS;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;// clear status flags&lt;BR /&gt;&lt;BR /&gt;&amp;nbsp; SPID = data2;&amp;nbsp;&amp;nbsp;&amp;nbsp;// load data into SPI register&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&lt;BR /&gt;&amp;nbsp; while (!SPIS_SPRF);&amp;nbsp;// wait for receive full flag&lt;BR /&gt;&amp;nbsp; &amp;nbsp;SPID;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;// dummy read to clear flags&lt;BR /&gt;}&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;If u have any codes to implement your suggest i'll try and feedback again&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 08 Jul 2009 18:24:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/SPI-Clock-problem/m-p/197158#M15845</guid>
      <dc:creator>longliveboy</dc:creator>
      <dc:date>2009-07-08T18:24:30Z</dc:date>
    </item>
    <item>
      <title>Re: SPI Clock problem</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/SPI-Clock-problem/m-p/197159#M15846</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;BLOCKQUOTE&gt;&lt;HR /&gt;longliveboy wrote:&lt;BR /&gt;&lt;P&gt;PEG;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;At the datasheet writes that&amp;nbsp;do not send second data before transmit buffer empty flag is set.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;[CUT]&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;If u have any codes to implement your suggest i'll try and feedback again&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;BLOCKQUOTE&gt;&lt;HR /&gt;&lt;/BLOCKQUOTE&gt;&lt;BLOCKQUOTE&gt;It's why it exists an interrupt connected to the trasmit buffer empty flag. I suggest to use it.&lt;/BLOCKQUOTE&gt;&lt;BLOCKQUOTE&gt;&amp;nbsp;&lt;/BLOCKQUOTE&gt;&lt;BLOCKQUOTE&gt;Bye Jack&amp;nbsp;&lt;/BLOCKQUOTE&gt;&lt;BLOCKQUOTE&gt;&amp;nbsp;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 08 Jul 2009 20:35:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/SPI-Clock-problem/m-p/197159#M15846</guid>
      <dc:creator>jag</dc:creator>
      <dc:date>2009-07-08T20:35:52Z</dc:date>
    </item>
    <item>
      <title>Re: SPI Clock problem</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/SPI-Clock-problem/m-p/197160#M15847</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;There is an additional requirement, that an overrun condition must not occur, or further byte transfers will fail.&amp;nbsp; Therefore the SPRF flag must be cleared three times, each prior to the completion of transfer of the next byte.&amp;nbsp; This would apply even if you have no interest in the return data.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Some untested code -&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;FONT face="courier new,courier"&gt;while (!SPIS_SPTEF);&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="courier new,courier"&gt;SPID = adres;&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="courier new,courier"&gt;while (!SPIS_SPTEF);&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="courier new,courier"&gt;SPID = data1;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Second byte queued to buffer&lt;BR /&gt;&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="courier new,courier"&gt;while (!SPIS_SPRF);&amp;nbsp; // Wait for completion of first byte&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="courier new,courier"&gt;(void)SPID; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp; // Clear flag to prevent overrun&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="courier new,courier"&gt;while (!SPIS_SPTEF);&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="courier new,courier"&gt;SPID = data1;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Third byte queued to buffer&lt;BR /&gt;&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="courier new,courier"&gt;while (!SPIS_SPRF);&amp;nbsp; // Wait for completion of second byte&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="courier new,courier"&gt;(void)SPID; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp; // Clear flag to prevent overrun&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="courier new,courier"&gt;while (!SPIS_SPRF);&amp;nbsp; // Wait for completion of third byte&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="courier new,courier"&gt;(void)SPID; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp; // Clear flag&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="courier new,courier"&gt;&amp;nbsp;&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;Interrupts should be disabled prior to starting this process, otherwise it is possible for an overrun to occur while an unrelated interrupt is serviced, especially with a fast SPI clock.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;Regards,&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;Mac&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;&amp;nbsp;&lt;/FONT&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 09 Jul 2009 22:44:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/SPI-Clock-problem/m-p/197160#M15847</guid>
      <dc:creator>bigmac</dc:creator>
      <dc:date>2009-07-09T22:44:05Z</dc:date>
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  </channel>
</rss>

