8-bit MicrocontrollersのトピックRe: RS08 Design Decisions -- Register Packing

RS08 Design Decisions -- Register Packing

Curt — Sun, 25 Mar 2007 12:12:12 GMT

In looking at the RS08 configuration registers, you can't help but notice that they _could_ have been much more tightly packed. For example: the ICSC1 and ICSC2 registers occupy 16 bits of RAM address space at $0014 and $0015 -- but only 5 of these sixteen bits are actually used. Similarly, locations $0017 and $0018 could clearly be combined into a single byte -- with two bits to spare.

Does anyone know why Freescale chose to abandon so many bit addresses in low RAM, rather than implementing them and allowing their use as flags? I would think that the real estate savings from not doing this would be marginal.

Re: RS08 Design Decisions -- Register Packing

billw — Mon, 26 Mar 2007 13:21:50 GMT

Most likely this is for compatibility with other products. For instance, the ICSCx registers in the MC9S08QG (HCS08 core vs RS08 core) uses pretty much all 16 bits. Likewise the other CPU families had a full 256 bytes of "directly addressed" low address space, so it wasn't so important to pack things tightly.

Also keep in mind that these probably aren't real "RAM" locations; they're more likely
to be bare flipflops per bit off in the relevant hardware that directly control the related function. Separate bits might be at separate address because reading or writing that address may trigger some action that shouldn't occur when reading or writing the other bits. And the in-between bits probably don't even exist in hardware.

Re: RS08 Design Decisions -- Register Packing

Curt — Tue, 27 Mar 2007 10:43:57 GMT

Ah -- interesting. I've not used the HC08 or HCS08, so wasn't aware of the effort to

achieve family compatibility.

Can't help but wonder what the Freescale designers would bring to market if they completely abandoned family compatibility though, and shot for the "Ultimate 8-pin MCU" instead.

Maybe that would be a fun FPGA project

Re: RS08 Design Decisions -- Register Packing

peg — Tue, 27 Mar 2007 18:55:25 GMT

Curt wrote:
Ah -- interesting. I've not used the HC08 or HCS08, so wasn't aware of the effort to
achieve family compatibility.

Can't help but wonder what the Freescale designers would bring to market if they completely abandoned family compatibility though, and shot for the "Ultimate 8-pin MCU" instead.

Maybe that would be a fun FPGA project

Yes, and notice how if you just change a couple of words in the above it could be a Mac person talking about Wintel PC's

Not that I have anything against compatability but it can get in the way when pushed too far.

Re: RS08 Design Decisions -- Register Packing

Curt — Wed, 28 Mar 2007 01:37:04 GMT

Compatibility run amok:

My RS08 has 8 pins, 2KB of flash memory and less than 80 bytes of RAM. I like it because I think small is beautiful.

To use it, Freescale provides CodeWarrior -- a very nice IDE.

But ... CW occupies 623 _MEGAbytes_ of space on my laptop hard drive, and spans almost _10,000_ files! (!!!) And this doesn't count the Softec files...

Wow! This is the Federal Government of development systems

(Understand that I am an old guy, and remember when having 64K of memory put you on the cutting edge. The whole IDE fit in that 64K, by the way...)

Message Edited by Curt on 2007-03-2701:37 PM

Re: RS08 Design Decisions -- Register Packing

Alban — Wed, 28 Mar 2007 05:30:48 GMT

CW for 8-bit does not only support RS08 but also the myriad of HC08 and S08.

This does make quite a few devices.

If you add the fact that some developers want ASM when others want C, you multiply again the number of files with headers.

Finally when you add third party software like P&E Micro, OSBDM08 and Processor Expert... (you say you don't count SofTec, but stationary is to be included)

You do end up with an IDE quite roomy, but covers the whole 8-bit.

Alban.

Re: RS08 Design Decisions -- Register Packing

billw — Wed, 28 Mar 2007 15:50:55 GMT

Curt wrote:
Can't help but wonder what the Freescale designers would bring to market if they completely abandoned family compatibility though, and shot for the "Ultimate 8-pin MCU" instead.

Given a reasonable C compiler, one could argue that the micro should be designed for minimum cost and silicon area, rather than any elegance at all. And maybe that's what and RS08 *is* ? Although I've often been surprised that certain classic CPUs don't reappear as microcontorllers now that the patents have expired (presumably?) and the original parent companies have disappeared. PDP-11 in a uC, anyone? (or is that just a 68000/Coldfire?) How about an IBM360 or PDP6? Having been designed in the timeframe that they were designed in, they can't be that big, silicon-wise (I recall hearing that the PDP6 CPU was 3000 gates.)

Re: RS08 Design Decisions -- Register Packing

Curt — Thu, 29 Mar 2007 01:23:45 GMT

Hmmm... I don't know billw...

Elegance and low cost need not be mutually exclusive -- especially if one considers life cycle cost. And sIlicon is alarmingly cheap if you don't insist on sub-micron, triple-level metal processes and a 600 pin BGA package (The later is, of course, not particularly good news to a Freescale...).

I think the 6800 was something of an effort to achieve a PDP8 in a single chip wasn't it? So the siren song of family compatibility has a very long history at Mot/Freescale!

One thing for sure though. If you'd have told an engineer with a PDP8 that he was going to need 10,000 files to make his minicomputer work, he/she would have a) been gob-smacked for a minute or two and then b) laughed in your face Then gone back to poking holes in his paper tape!