8-bit MicrocontrollersのトピックRe: Waking up from LPRun/LPWait - MC9S08QE64

Waking up from LPRun/LPWait - MC9S08QE64

hek — Fri, 01 Feb 2008 22:02:00 GMT

Hi folks,

I have a queation for you guys.
I have a system that's supposed to run on a S08QE64. In one of the modes it only communicates on a UART. Since it is a battery driven system I want to save as much power as possible.
What I want to do is wake up from some LP mode whenever data is recieved on the uart, process the data, and then go back to sleep again. I have no control over the data sent to me, and it has to be in 57,6 kbaud.
My first question: Is this possible without losing the first bit (at the given baud rate)?
My second question: Other modes of the application requires some computaional power, so running at a low clock all the time is out of the question (I would prefer an external high freq. crystal), and LPWait and LPRun seem to demand external clock, but there is only one clock input to the mcu? So if i want to use the LP modes, i have to use the internal osc. in run mode and an exernal low freq. source in LP?

Im new to this chip, hence all the stupid questions.

Best regards
Henrik

Message Edited by NLFSJ on 2008-02-02 07:56 AM

Added p/n to subject.

Message Edited by NLFSJ on 2008-02-02 07:56 AM

Re: Waking up from LPRun/LPWait - MC9S08QE64

fabio — Sun, 03 Feb 2008 23:17:32 GMT

QE devices include the version 4 of the SCI module, which is able to wakeup the CPU from a stop3 mode by using the edge detection circuitry.

Using this feature the SCI is able to wakeup the CPU upon receiving a character, but I am not sure if the first character will be received correctly, specially at this speed (I believe it will work ok).

Regarding to the LPrun and LPwait modes, they are rated for a maximum 125 kHz BUSCLK. At this speed is impossible to achieve baud rates of 57k6.

Best regards,

Re: Waking up from LPRun/LPWait - MC9S08QE64

bigmac — Mon, 04 Feb 2008 01:56:11 GMT

Hello,

With STOP3 mode, since clocks remain active, I would presume that the SCI module remains functional. It would therefore seem probable that the first character would be received correctly. On the assumption that wakeup wold occur on the start bit transition, RDRF flag should become set about 170 microseconds later. The incoming character would then need to be read within the next 170 microseconds to avoid overrun.

I would assume that the SCI module must remain enabled for edge transition to work, so the peripheral clock must also be enabled continuously, with the associated current draw penality this requires.

To achieve lower current draw, perhaps using STOP2 mode, would require use of RTS/CTS hanshaking to provide wakeup. The originating end would first set RTS active, and would wait until CTS returned active, before sending the first character of a sequence. At the MCU end, the RTS signal might activate a KBI input, to cause wakeup. When the KBI interrupt is serviced after some wakeup delay, the return CTS line would be activated to allow transmission of the first and subsequent characters.

Another issue for either approach - the RS232 receive buffer for the received data (or RTS) will require to remain continuously active. This may mean that the interface device can never enter sleep mode, for reduced current.

Regards,

Mac

Re: Waking up from LPRun/LPWait - MC9S08QE64

JimDon — Mon, 04 Feb 2008 02:32:57 GMT

Well if you use a chip like MAX3227 is has auto sleep mode of a few u amps.
It does wake up in time, but the combined wake ups make prove a problem, unless you could have them run concurrently by using another input that while not true RS-232, would cause the wake up.

Re: Waking up from LPRun/LPWait - MC9S08QE64

hek — Mon, 04 Feb 2008 16:24:56 GMT

Thank you all for your replies!

As soon as i get my eval kit this will be the first I test. Ill get back to you with the result. The wake-up time from Stop3 should be sufficient (6us, a bit in 57k6 is ~17us), getting lower isnt really that interesting...

One question though, why would it be impossible to maintain 57k6 baud with a bus speed at 125kHz?

Best regards
Henrik

Re: Waking up from LPRun/LPWait - MC9S08QE64

fabio — Mon, 04 Feb 2008 20:18:55 GMT

Because the baud rate divisors (SCIBDH and SCIBDL registers) can only provide an integer factor. For a 125kHz BUSCLK, your dividing factor would be 125000/57600 = 2.17.

With SCIBD = 2, your actual baud rate will be equal to 62500 bps

With SCIBD = 3, your actual baud rate will be equal to 41667 bps.

Best regards,

Re: Waking up from LPRun/LPWait - MC9S08QE64

hek — Mon, 04 Feb 2008 20:29:03 GMT

But it should be possible to choose another clock source that can be divided down to 57.6K?

Re: Waking up from LPRun/LPWait - MC9S08QE64

JimDon — Mon, 04 Feb 2008 21:22:55 GMT

It is worse than than that - its BCLK/baudrate/16 so the best you could get would be 7.8K baudrate with a 125K BCLK.
You need a bus clock of at least baudrate * 16 or 1.84 Mhz. And as pointed out if it is not a multiple, it will not be very accurate. This mean the CLK needs to be 3.68 Mhz.

Message Edited by JimDon on 2008-02-04 08:25 AM