8-bit MicrocontrollersのトピックRe: Minimal startup time on S08SG

Minimal startup time on S08SG

FabVio — Thu, 10 Nov 2011 16:17:24 GMT

Hi to all.

I've a problem, I use a S08SG32 for a quick control.

I nedd to control a digital signal in a time of 300us from startup (power on).

I've developed my code and my board, but the system start in 2.5ms!!

I use internal clock, the datasheet certify 100us max of startup.

How can I solve this problem.

How I can start my code unless of 300us?

I use codewarrior 6.3 downloaded by freescale site, I write my code in C.

Thanks to all

Re: Minimal startup time on S08SG

kef — Thu, 10 Nov 2011 17:56:16 GMT

Since you are using C, startup time depends on how many variables do you have. By default C startup code clears all not initialized static storage variables, also performs initialization for static storage variables, for with you specify initialization values, like int i=555;.

You can either use non ANSI startup code and skip over variables initialization. Or, you can allocate variables, that don't have to be initialized in NO_INIT segments instead of READ_WRITE segments. For example various queue buffers (which are often big) usually don't have to be initialized. To do so you need to split your RAM sgment definition in PRM file into two parts like

SEGMENTS

RAM = READ_WRITE 0x0100 TO 0x01FF;

NOINITRAM = NO_INIT 0x0200 TO 0x02FF;

PLACEMENT

DEFAULT_RAM INTO RAM;

NOINIT_RAM INTO NOINITRAM;

In your code

#pragma DATA_SEG NOINIT_RAM

char mybigfifobuffer[100];

#pragma DATA_SEG DEFAULT

This should reduce startup time by ~100*10 bus clock cycles (see startup up code timing).

Re: Minimal startup time on S08SG

bigmac — Thu, 10 Nov 2011 18:37:30 GMT

Hello,

The 100us specification refers only to the internal reference startup period. Assuming that you are using FEI mode, there will be a further delay for the FLL acquisition time, 1ms maximum, for the FLL to lock. Does your code wait for the FLL to lock prior to doing other initialisation tasks?

I would then assume that your ultimate task of controlling the output signal would occur only after the required peripherals and GPIO have been initialised, and the main loop is entered. This initialisation is in addition to the ANSI initialisation of static variables.

It is possible that a period of 300us may not be feasible, once these other factors are taken into account.

Regards,

Mac