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    <title>8-bit MicrocontrollersのトピックHCS08LG32 Pin Multiplex Question</title>
    <link>https://community.nxp.com/t5/8-bit-Microcontrollers/HCS08LG32-Pin-Multiplex-Question/m-p/171314#M11528</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, I'm using the LG32 and wish to use GPIO pins as full complementary driver.&amp;nbsp; According to the LG32 manual:&lt;/P&gt;&lt;P&gt;&amp;nbsp;"Pins that have shared function with the LCD have special behavior based on the state of the VSUPPLY bits in the LCDSUPPLY register. These pins (PTA, PTB, PTC[4:0], PTD, PTE and PTG) can operate as full complementary drive or open drain drive depending on the VSUPPLY bits. When VLL3 is connected to VDD externally, VSUPPLY = 11, FCDEN = 1, and RVEN = 0; the pins operate as full complementary drive. For all other VSUPPLY modes, the GPIO shared with LCD operates as open drain. "&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;My problem is that I am unable to change the VSUPPLY to 11 or FCDEN to 1 (RVEN=0 by default).&amp;nbsp; When attempting to change these values in CodeWarrior using the memory window, my new values are not accepted.&amp;nbsp; I also cannot change the values in code.&amp;nbsp; I have also tried jumpering VLL3 to VDD externally and re-booting the board....still no success.&lt;/P&gt;&lt;P&gt;Any suggestions welcome.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Sun, 31 Jan 2010 05:15:54 GMT</pubDate>
    <dc:creator>Thunder</dc:creator>
    <dc:date>2010-01-31T05:15:54Z</dc:date>
    <item>
      <title>HCS08LG32 Pin Multiplex Question</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/HCS08LG32-Pin-Multiplex-Question/m-p/171314#M11528</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, I'm using the LG32 and wish to use GPIO pins as full complementary driver.&amp;nbsp; According to the LG32 manual:&lt;/P&gt;&lt;P&gt;&amp;nbsp;"Pins that have shared function with the LCD have special behavior based on the state of the VSUPPLY bits in the LCDSUPPLY register. These pins (PTA, PTB, PTC[4:0], PTD, PTE and PTG) can operate as full complementary drive or open drain drive depending on the VSUPPLY bits. When VLL3 is connected to VDD externally, VSUPPLY = 11, FCDEN = 1, and RVEN = 0; the pins operate as full complementary drive. For all other VSUPPLY modes, the GPIO shared with LCD operates as open drain. "&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;My problem is that I am unable to change the VSUPPLY to 11 or FCDEN to 1 (RVEN=0 by default).&amp;nbsp; When attempting to change these values in CodeWarrior using the memory window, my new values are not accepted.&amp;nbsp; I also cannot change the values in code.&amp;nbsp; I have also tried jumpering VLL3 to VDD externally and re-booting the board....still no success.&lt;/P&gt;&lt;P&gt;Any suggestions welcome.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 31 Jan 2010 05:15:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/HCS08LG32-Pin-Multiplex-Question/m-p/171314#M11528</guid>
      <dc:creator>Thunder</dc:creator>
      <dc:date>2010-01-31T05:15:54Z</dc:date>
    </item>
    <item>
      <title>Re: HCS08LG32 Pin Multiplex Question</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/HCS08LG32-Pin-Multiplex-Question/m-p/171315#M11529</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;you need to disable clock gating for the LCD module e.g. like this:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;SCGC2_LCD = 1;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;otherwise there are no clocks to the module and some registers don't work correctly.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Oliver&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 27 Feb 2010 00:21:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/HCS08LG32-Pin-Multiplex-Question/m-p/171315#M11529</guid>
      <dc:creator>Oliver</dc:creator>
      <dc:date>2010-02-27T00:21:51Z</dc:date>
    </item>
    <item>
      <title>Re: HCS08LG32 Pin Multiplex Question</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/HCS08LG32-Pin-Multiplex-Question/m-p/171316#M11530</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks Oliver. In the interim I contacted Freescale support, who pretty much said the same thing.&amp;nbsp; I used their input and it is working fine now.&amp;nbsp; FYI, I am enclosing below their response which helped me through this...&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;/** Enable clock to the LCD module */&lt;/P&gt;&lt;P&gt;&amp;nbsp;SCGC2_LCD = 1;&lt;/P&gt;&lt;P&gt;/** Disable LCD module */&lt;/P&gt;&lt;P&gt;LCDC0_LCDEN = 0;&lt;/P&gt;&lt;P&gt;LCDC1_FCDEN = 1;&lt;/P&gt;&lt;P&gt;LCDSUPPLY_VSUPPLY = 0b11;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;"The most common error that I've seen so far is that the first two lines aren't included. These instructions are very important because if the module doesn't have a bus clock enable, the registers will not experience any change. In order to have a better configuration the LCD peripheral needs to disable the waveform generation (second instruction) "&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 27 Feb 2010 00:55:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/HCS08LG32-Pin-Multiplex-Question/m-p/171316#M11530</guid>
      <dc:creator>Thunder</dc:creator>
      <dc:date>2010-02-27T00:55:07Z</dc:date>
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