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    <title>topic Re: MC1321x FLL continuously looses lock when using high frequency range in 8-bit Microcontrollers</title>
    <link>https://community.nxp.com/t5/8-bit-Microcontrollers/MC1321x-FLL-continuously-looses-lock-when-using-high-frequency/m-p/165316#M10387</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Hi Marc,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Can you pls try it with OSCSTEN set in ICGC1, and let us have some feedback? The comparison cycle is very different between the test with RANGE=0 and RANGE=1, and I'm guessing that, since the part locks once, it will be a low power mode issue.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;NV_ICGC1 = 0x5C;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Good luck,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Mark&lt;/DIV&gt;&lt;BR /&gt;&lt;BR /&gt;Message Edited by UK_CF_FAE on &lt;SPAN class="date_text"&gt;2008-06-17&lt;/SPAN&gt; &lt;SPAN class="time_text"&gt;08:14 PM&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 18 Jun 2008 02:13:43 GMT</pubDate>
    <dc:creator>UK_CF_FAE</dc:creator>
    <dc:date>2008-06-18T02:13:43Z</dc:date>
    <item>
      <title>MC1321x FLL continuously looses lock when using high frequency range</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/MC1321x-FLL-continuously-looses-lock-when-using-high-frequency/m-p/165315#M10386</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;SPAN&gt;I'm trying to increase the clock output of the modem in the MC1321x so that I can use it as clock input for another external MCU. The original setting from the Beekit myWirelessApplication sample code is:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;- #define CLOCK_OUT_SETTING&amp;nbsp;&amp;nbsp; 0x7E85 (nv_data.h), which outputs 62.5 KHz out of the modem&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;- NV_ICGC1 = 0x18 (nv_data.c), which sets the oscillator as low frequency range (FLL loop prescale factor P is 64)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;- NV_ICGC2 = 0x20 (nv_data.c), which sets the multiplication factor to 8&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;So the MCU will run at 62.5 KHz * 64 * 8 = 32 MHz, which is what we want&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Now I would like to output 8 MHz from the modem instead. I've changed the above settings to:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;- #define CLOCK_OUT_SETTING&amp;nbsp;&amp;nbsp; 0x7E81 (nv_data.h), which outputs 8 MHz out of the modem&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;- NV_ICGC1 = 0x58 (nv_data.c), which sets the oscillator as high frequency range (FLL loop prescale factor P is 1)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;- NV_ICGC2 = 0x00 (nv_data.c), which sets the multiplication factor to 4&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;So the MCU will run at 8 MHz * 1 * 4 = 32 MHz&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;The FLL locks correctly and the hiwave debugger confirms a bus frequency of 16 028 535 Hz, but the loss of FLL lock interrupt gets called continuously thereafter (FLL_Lost_Lock_ISR).&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I've tried multiple combinations of modem clock out settings and FLL settings. In summary:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; - If I keep the output in the low frequency range (62.5KHz or 32.786KHz with RANGE bit of ICGC1 = 0), everything works fine (no loss of lock)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; - If I put the output in the high frequency range (2 MHz, 4 MHz pr 8 MHz with RANGE bit of ICGC1 = 1), the problem occurs.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Can anyone give me some pointers on this issue?&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks!&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Marc&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 17 Jun 2008 21:58:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/MC1321x-FLL-continuously-looses-lock-when-using-high-frequency/m-p/165315#M10386</guid>
      <dc:creator>MarcB</dc:creator>
      <dc:date>2008-06-17T21:58:43Z</dc:date>
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    <item>
      <title>Re: MC1321x FLL continuously looses lock when using high frequency range</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/MC1321x-FLL-continuously-looses-lock-when-using-high-frequency/m-p/165316#M10387</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Hi Marc,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Can you pls try it with OSCSTEN set in ICGC1, and let us have some feedback? The comparison cycle is very different between the test with RANGE=0 and RANGE=1, and I'm guessing that, since the part locks once, it will be a low power mode issue.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;NV_ICGC1 = 0x5C;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Good luck,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Mark&lt;/DIV&gt;&lt;BR /&gt;&lt;BR /&gt;Message Edited by UK_CF_FAE on &lt;SPAN class="date_text"&gt;2008-06-17&lt;/SPAN&gt; &lt;SPAN class="time_text"&gt;08:14 PM&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 18 Jun 2008 02:13:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/MC1321x-FLL-continuously-looses-lock-when-using-high-frequency/m-p/165316#M10387</guid>
      <dc:creator>UK_CF_FAE</dc:creator>
      <dc:date>2008-06-18T02:13:43Z</dc:date>
    </item>
    <item>
      <title>Re: MC1321x FLL continuously looses lock when using high frequency range</title>
      <link>https://community.nxp.com/t5/8-bit-Microcontrollers/MC1321x-FLL-continuously-looses-lock-when-using-high-frequency/m-p/165317#M10388</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;Thanks for the input Mark.&lt;BR /&gt;&lt;BR /&gt;Unfortunately this has not solved the problem.&lt;BR /&gt;&lt;BR /&gt;Is such a clock configuration something that should work? That is supported? That has been tried on one of the dev boards?&lt;BR /&gt;&lt;BR /&gt;Thanks&lt;BR /&gt;Marc&lt;BR /&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 18 Jun 2008 04:59:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/8-bit-Microcontrollers/MC1321x-FLL-continuously-looses-lock-when-using-high-frequency/m-p/165317#M10388</guid>
      <dc:creator>MarcB</dc:creator>
      <dc:date>2008-06-18T04:59:53Z</dc:date>
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